Geometric Arithmetic Parallel Processor - Revision history

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2024-07-12T06:10:58Z

Altered pages. Formatted dashes. | Use this bot. Report bugs. | Suggested by Abductive | Category:Digital signal processing | #UCB_Category 155/203

← Previous revision		Revision as of 06:10, 12 July 2024
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	In mathematics, Holsztyński is known for Holsztyński theorem. <ref>{{cite journal \| last=Holsztyński\|first=W. \|title=Continuous mappings induced by isometries of spaces of continuous functions \|journal=		In mathematics, Holsztyński is known for Holsztyński theorem. <ref>{{cite journal \| last=Holsztyński\|first=W. \|title=Continuous mappings induced by isometries of spaces of continuous functions \|journal=
	Studia Mathematica \| volume=26(1966)\|pages=~~133-136~~}}</ref>		Studia Mathematica \| volume=26(1966)\|pages=133–136}}</ref>

	==References==		==References==

Fas0la2012: reference corrected

2024-05-04T01:16:04Z

reference corrected

← Previous revision		Revision as of 01:16, 4 May 2024
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	In its most recent incarnation (as of 2004), the systems by Teranex utilize GAPP arrays of up to 294,912 processing elements.		In its most recent incarnation (as of 2004), the systems by Teranex utilize GAPP arrays of up to 294,912 processing elements.

	In mathematics, Holsztyński is known for Holsztyński theorem. <ref>{{cite journal \| last=Holsztyński\|first=W. \|title=Continuous mappings induced by isometries of spaces of continuous functions\| journal=		In mathematics, Holsztyński is known for Holsztyński theorem. <ref>{{cite journal \| last=Holsztyński\|first=W. \|title=Continuous mappings induced by isometries of spaces of continuous functions \|journal=
	Studia Mathematica\| volume=26\|(1966)\|pages=133-136}}</ref>		Studia Mathematica \| volume=26(1966)\|pages=133-136}}</ref>

	==References==		==References==

Fas0la2012: reference added

2024-05-04T01:13:45Z

reference added

← Previous revision		Revision as of 01:13, 4 May 2024
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	In its most recent incarnation (as of 2004), the systems by Teranex utilize GAPP arrays of up to 294,912 processing elements.		In its most recent incarnation (as of 2004), the systems by Teranex utilize GAPP arrays of up to 294,912 processing elements.

	In mathematics, Holsztyński is known for Holsztyński theorem.		In mathematics, Holsztyński is known for Holsztyński theorem. <ref>{{cite journal \| last=Holsztyński\|first=W. \|title=Continuous mappings induced by isometries of spaces of continuous functions\| journal=
			Studia Mathematica\| volume=26\|(1966)\|pages=133-136}}</ref>

	==References==		==References==

Fas0la2012: Added "In mathematics, Holsztyński is known for Holsztyński theorem." as it can be verified by google search

2024-05-04T01:00:11Z

Added "In mathematics, Holsztyński is known for Holsztyński theorem." as it can be verified by google search

← Previous revision		Revision as of 01:00, 4 May 2024
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	The 10,000-element GAPP grew to 82,944 elements by 1992.<ref>{{cite book\|author=Gilbert Kalb and Robert Moxley\|title=Massively Parallel, Optical and Neural Computing in the United States\|year=1992\|publisher=IOS Press\|isbn=9789051990973\|page=20\|url=https://books.google.com/books?id=7Ao4TBf4uv4C&pg=PA20}}</ref>		The 10,000-element GAPP grew to 82,944 elements by 1992.<ref>{{cite book\|author=Gilbert Kalb and Robert Moxley\|title=Massively Parallel, Optical and Neural Computing in the United States\|year=1992\|publisher=IOS Press\|isbn=9789051990973\|page=20\|url=https://books.google.com/books?id=7Ao4TBf4uv4C&pg=PA20}}</ref>
	In its most recent incarnation (as of 2004), the systems by Teranex utilize GAPP arrays of up to 294,912 processing elements.		In its most recent incarnation (as of 2004), the systems by Teranex utilize GAPP arrays of up to 294,912 processing elements.

			In mathematics, Holsztyński is known for Holsztyński theorem.

	==References==		==References==

Certes: improve link: Mathematician (via WP:JWB)

2022-03-24T21:45:07Z

improve link: Mathematician (via WP:JWB)

← Previous revision		Revision as of 21:45, 24 March 2022
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	{{Refimprove\|date=August 2007}}		{{Refimprove\|date=August 2007}}
	In [[parallel computing]], the '''Geometric Arithmetic Parallel Processor''' ('''GAPP'''), invented by [[Poland\|Polish]] [[~~mathematics\|~~mathematician]] [[Włodzimierz Holsztyński]] in 1981, was patented by [[Martin Marietta]]<ref>		In [[parallel computing]], the '''Geometric Arithmetic Parallel Processor''' ('''GAPP'''), invented by [[Poland\|Polish]] [[mathematician]] [[Włodzimierz Holsztyński]] in 1981, was patented by [[Martin Marietta]]<ref>
	[http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=4739474.PN.&OS=PN/4739474&RS=PN/4739474 Geometric-arithmetic parallel processor] US Patent 4,739,474, April 19, 1988		[http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=4739474.PN.&OS=PN/4739474&RS=PN/4739474 Geometric-arithmetic parallel processor] US Patent 4,739,474, April 19, 1988
	</ref> and is now owned by [[Silicon Optix]], Inc. The GAPP's [[network topology]] is a [[mesh networking\|mesh]]-connected array of single-bit [[SIMD]] [[processing element]]s (PEs), where each PE can communicate with its neighbor to the north, east, south, and west. Each cell has its own memory. The space of addresses is the same for all cells. The data travels from the cell memories to the cell registers, and in the opposite direction, in parallel. Characteristically, the cell's [[arithmetic logic unit]] (ALU) (that is, its PE) in the early versions of GAPP was nothing but a [[1-bit computing\|1-bit]] full-adder/subtractor, which efficiently served both the complex arithmetic as well as logical functions, and with the help of shifts it served also the geometric transformations—in short, it was doing all three types of the tasks (while other designs used three separate hardware special-purpose units instead).		</ref> and is now owned by [[Silicon Optix]], Inc. The GAPP's [[network topology]] is a [[mesh networking\|mesh]]-connected array of single-bit [[SIMD]] [[processing element]]s (PEs), where each PE can communicate with its neighbor to the north, east, south, and west. Each cell has its own memory. The space of addresses is the same for all cells. The data travels from the cell memories to the cell registers, and in the opposite direction, in parallel. Characteristically, the cell's [[arithmetic logic unit]] (ALU) (that is, its PE) in the early versions of GAPP was nothing but a [[1-bit computing\|1-bit]] full-adder/subtractor, which efficiently served both the complex arithmetic as well as logical functions, and with the help of shifts it served also the geometric transformations—in short, it was doing all three types of the tasks (while other designs used three separate hardware special-purpose units instead).

R'n'B: Disambiguated: 1-bit → 1-bit computing

2021-05-28T19:38:47Z

Disambiguated: 1-bit → 1-bit computing

← Previous revision		Revision as of 19:38, 28 May 2021
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	In [[parallel computing]], the '''Geometric Arithmetic Parallel Processor''' ('''GAPP'''), invented by [[Poland\|Polish]] [[mathematics\|mathematician]] [[Włodzimierz Holsztyński]] in 1981, was patented by [[Martin Marietta]]<ref>		In [[parallel computing]], the '''Geometric Arithmetic Parallel Processor''' ('''GAPP'''), invented by [[Poland\|Polish]] [[mathematics\|mathematician]] [[Włodzimierz Holsztyński]] in 1981, was patented by [[Martin Marietta]]<ref>
	[http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=4739474.PN.&OS=PN/4739474&RS=PN/4739474 Geometric-arithmetic parallel processor] US Patent 4,739,474, April 19, 1988		[http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=4739474.PN.&OS=PN/4739474&RS=PN/4739474 Geometric-arithmetic parallel processor] US Patent 4,739,474, April 19, 1988
	</ref> and is now owned by [[Silicon Optix]], Inc. The GAPP's [[network topology]] is a [[mesh networking\|mesh]]-connected array of single-bit [[SIMD]] [[processing element]]s (PEs), where each PE can communicate with its neighbor to the north, east, south, and west. Each cell has its own memory. The space of addresses is the same for all cells. The data travels from the cell memories to the cell registers, and in the opposite direction, in parallel. Characteristically, the cell's [[arithmetic logic unit]] (ALU) (that is, its PE) in the early versions of GAPP was nothing but a [[1-bit]] full-adder/subtractor, which efficiently served both the complex arithmetic as well as logical functions, and with the help of shifts it served also the geometric transformations—in short, it was doing all three types of the tasks (while other designs used three separate hardware special-purpose units instead).		</ref> and is now owned by [[Silicon Optix]], Inc. The GAPP's [[network topology]] is a [[mesh networking\|mesh]]-connected array of single-bit [[SIMD]] [[processing element]]s (PEs), where each PE can communicate with its neighbor to the north, east, south, and west. Each cell has its own memory. The space of addresses is the same for all cells. The data travels from the cell memories to the cell registers, and in the opposite direction, in parallel. Characteristically, the cell's [[arithmetic logic unit]] (ALU) (that is, its PE) in the early versions of GAPP was nothing but a [[1-bit computing\|1-bit]] full-adder/subtractor, which efficiently served both the complex arithmetic as well as logical functions, and with the help of shifts it served also the geometric transformations—in short, it was doing all three types of the tasks (while other designs used three separate hardware special-purpose units instead).

	The 10,000-element GAPP grew to 82,944 elements by 1992.<ref>{{cite book\|author=Gilbert Kalb and Robert Moxley\|title=Massively Parallel, Optical and Neural Computing in the United States\|year=1992\|publisher=IOS Press\|isbn=9789051990973\|page=20\|url=https://books.google.com/books?id=7Ao4TBf4uv4C&pg=PA20}}</ref>		The 10,000-element GAPP grew to 82,944 elements by 1992.<ref>{{cite book\|author=Gilbert Kalb and Robert Moxley\|title=Massively Parallel, Optical and Neural Computing in the United States\|year=1992\|publisher=IOS Press\|isbn=9789051990973\|page=20\|url=https://books.google.com/books?id=7Ao4TBf4uv4C&pg=PA20}}</ref>

Widefox: fix sect WP:ORDER , bold alt/link to parent, links

2019-10-20T11:39:51Z

fix sect WP:ORDER , bold alt/link to parent, links

← Previous revision		Revision as of 11:39, 20 October 2019
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		⚫	{{Refimprove\|date=August 2007}}
	~~The~~ '''~~GAPP''' (~~Geometric-Arithmetic ~~[[Parallel computing\|~~Parallel Processor]]), invented by [[Poland\|Polish]] [[mathematics\|mathematician]] [[Włodzimierz Holsztyński]] in 1981, was patented by [[Martin Marietta]]<ref>		In [[parallel computing]], the '''Geometric Arithmetic Parallel Processor''' ('''GAPP'''), invented by [[Poland\|Polish]] [[mathematics\|mathematician]] [[Włodzimierz Holsztyński]] in 1981, was patented by [[Martin Marietta]]<ref>
	[http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=4739474.PN.&OS=PN/4739474&RS=PN/4739474 Geometric-arithmetic parallel processor] US Patent 4,739,474, April 19, 1988		[http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=4739474.PN.&OS=PN/4739474&RS=PN/4739474 Geometric-arithmetic parallel processor] US Patent 4,739,474, April 19, 1988
		⚫	</ref> and is now owned by [[Silicon Optix]], Inc. The GAPP's [[network topology]] is a [[mesh networking\|mesh]]-connected array of single-bit [[SIMD]] [[processing element]]s (PEs), where each PE can communicate with its neighbor to the north, east, south, and west. Each cell has its own memory. The space of addresses is the same for all cells. The data travels from the cell memories to the cell registers, and in the opposite direction, in parallel. Characteristically, the cell's [[arithmetic logic unit]] (ALU) (that is, its PE) in the early versions of GAPP was nothing but a [[1-bit]] full-adder/subtractor, which efficiently served both the complex arithmetic as well as logical functions, and with the help of shifts it served also the geometric transformations—in short, it was doing all three types of the tasks (while other designs used three separate hardware special-purpose units instead).
	</ref>
⚫	and is now owned by [[Silicon Optix]], Inc. The GAPP's [[network topology]] is a mesh-connected array of single-bit [[SIMD]] processing ~~elements~~ (PEs), where each PE can communicate with its neighbor to the north, east, south, and west. Each cell has its own memory. The space of addresses is the same for all cells. The data travels from the cell memories to the cell registers, and in the opposite direction, in parallel. Characteristically, the cell's ALU (that is, its PE) in the early versions of GAPP was nothing but a 1-bit full-adder/subtractor, which efficiently served both the complex arithmetic as well as logical functions, and with the help of shifts it served also the geometric transformations—in short, it was doing all three types of the tasks (while other designs used three separate hardware special-purpose units instead).

	The 10,000-element GAPP grew to 82,944 elements by 1992.<ref>{{cite book\|author=Gilbert Kalb and Robert Moxley\|title=Massively Parallel, Optical and Neural Computing in the United States\|year=1992\|publisher=IOS Press\|isbn=9789051990973\|page=20\|url=https://books.google.com/books?id=7Ao4TBf4uv4C&pg=PA20}}</ref>		The 10,000-element GAPP grew to 82,944 elements by 1992.<ref>{{cite book\|author=Gilbert Kalb and Robert Moxley\|title=Massively Parallel, Optical and Neural Computing in the United States\|year=1992\|publisher=IOS Press\|isbn=9789051990973\|page=20\|url=https://books.google.com/books?id=7Ao4TBf4uv4C&pg=PA20}}</ref>
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	==References==		==References==
			{{Reflist}}
	<references />

⚫	{{Refimprove\|date=August 2007}}

	[[Category:SIMD computing]]		[[Category:SIMD computing]]
	[[Category:Digital signal processing]]		[[Category:Digital signal processing]]


	{{compu-hardware-stub}}		{{compu-hardware-stub}}

Wlod: The correct name of GAPP has a short dash "-": Geometric-Arithmetic Parallel Processor.

2017-05-10T20:10:06Z

The correct name of GAPP has a short dash "-": Geometric-Arithmetic Parallel Processor.

← Previous revision		Revision as of 20:10, 10 May 2017
Line 1:		Line 1:
	The '''GAPP''' (Geometric Arithmetic [[Parallel computing\|Parallel Processor]]), invented by [[Poland\|Polish]] [[mathematics\|mathematician]] [[Włodzimierz Holsztyński]] in 1981, was patented by [[Martin Marietta]]<ref>		The '''GAPP''' (Geometric-Arithmetic [[Parallel computing\|Parallel Processor]]), invented by [[Poland\|Polish]] [[mathematics\|mathematician]] [[Włodzimierz Holsztyński]] in 1981, was patented by [[Martin Marietta]]<ref>
	[http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=4739474.PN.&OS=PN/4739474&RS=PN/4739474 Geometric-arithmetic parallel processor] US Patent 4,739,474, April 19, 1988		[http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=4739474.PN.&OS=PN/4739474&RS=PN/4739474 Geometric-arithmetic parallel processor] US Patent 4,739,474, April 19, 1988
	</ref>		</ref>

Bender the Bot: /* top */http→https for Google Books and Google News using AWB

2016-10-11T05:39:09Z

top: http→https for Google Books and Google News using AWB

← Previous revision		Revision as of 05:39, 11 October 2016
Line 4:		Line 4:
	and is now owned by [[Silicon Optix]], Inc. The GAPP's [[network topology]] is a mesh-connected array of single-bit [[SIMD]] processing elements (PEs), where each PE can communicate with its neighbor to the north, east, south, and west. Each cell has its own memory. The space of addresses is the same for all cells. The data travels from the cell memories to the cell registers, and in the opposite direction, in parallel. Characteristically, the cell's ALU (that is, its PE) in the early versions of GAPP was nothing but a 1-bit full-adder/subtractor, which efficiently served both the complex arithmetic as well as logical functions, and with the help of shifts it served also the geometric transformations—in short, it was doing all three types of the tasks (while other designs used three separate hardware special-purpose units instead).		and is now owned by [[Silicon Optix]], Inc. The GAPP's [[network topology]] is a mesh-connected array of single-bit [[SIMD]] processing elements (PEs), where each PE can communicate with its neighbor to the north, east, south, and west. Each cell has its own memory. The space of addresses is the same for all cells. The data travels from the cell memories to the cell registers, and in the opposite direction, in parallel. Characteristically, the cell's ALU (that is, its PE) in the early versions of GAPP was nothing but a 1-bit full-adder/subtractor, which efficiently served both the complex arithmetic as well as logical functions, and with the help of shifts it served also the geometric transformations—in short, it was doing all three types of the tasks (while other designs used three separate hardware special-purpose units instead).

	The 10,000-element GAPP grew to 82,944 elements by 1992.<ref>{{cite book\|author=Gilbert Kalb and Robert Moxley\|title=Massively Parallel, Optical and Neural Computing in the United States\|year=1992\|publisher=IOS Press\|isbn=9789051990973\|page=20\|url=~~http~~://books.google.com/books?id=7Ao4TBf4uv4C&pg=PA20}}</ref>		The 10,000-element GAPP grew to 82,944 elements by 1992.<ref>{{cite book\|author=Gilbert Kalb and Robert Moxley\|title=Massively Parallel, Optical and Neural Computing in the United States\|year=1992\|publisher=IOS Press\|isbn=9789051990973\|page=20\|url=https://books.google.com/books?id=7Ao4TBf4uv4C&pg=PA20}}</ref>
	In its most recent incarnation (as of 2004), the systems by Teranex utilize GAPP arrays of up to 294,912 processing elements.		In its most recent incarnation (as of 2004), the systems by Teranex utilize GAPP arrays of up to 294,912 processing elements.

BD2412: minor fixes, mostly disambig links using AWB

2015-09-28T14:38:16Z

minor fixes, mostly disambig links using AWB

← Previous revision		Revision as of 14:38, 28 September 2015
Line 1:		Line 1:
	The '''GAPP''' (Geometric Arithmetic [[~~parallel~~ ~~processing~~\|Parallel Processor]]), invented by [[Poland\|Polish]] [[mathematics\|mathematician]] [[Włodzimierz Holsztyński]] in 1981, was patented by [[Martin Marietta]]<ref>		The '''GAPP''' (Geometric Arithmetic [[Parallel computing\|Parallel Processor]]), invented by [[Poland\|Polish]] [[mathematics\|mathematician]] [[Włodzimierz Holsztyński]] in 1981, was patented by [[Martin Marietta]]<ref>
	[http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=4739474.PN.&OS=PN/4739474&RS=PN/4739474 Geometric-arithmetic parallel processor] US Patent 4,739,474, April 19, 1988		[http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=4739474.PN.&OS=PN/4739474&RS=PN/4739474 Geometric-arithmetic parallel processor] US Patent 4,739,474, April 19, 1988
	</ref>		</ref>