Java processor - Revision history

LemurianPatriot: Added short description

2025-04-13T03:43:18Z

Added short description

← Previous revision		Revision as of 03:43, 13 April 2025
Line 1:		Line 1:
			{{Short description\|Processor using Java bytecode as its instruction set}}
	A '''Java processor''' is the implementation of the [[Java virtual machine]] (JVM) in hardware. In other words, the [[Java bytecode]] that makes up the instruction set of the abstract machine becomes the instruction set of a concrete machine. These were the most popular form of a [[high-level language computer architecture]], and were "an attractive choice for building embedded and real-time systems that are programmed in Java".<ref name=Binder>{{cite book \|last1=Binder \|first1=Walter \|last2=Schoeberl \|first2=Martin \|last3=Moret \|first3=Philippe \|last4=Villazon \|first4=Alex \|title=2008 Fifth International Conference on Quantitative Evaluation of Systems \|chapter=Cross-Profiling for Embedded Java Processors \|date=September 2008 \|pages=287–296 \|doi=10.1109/QEST.2008.39\|isbn=978-0-7695-3360-5 \|s2cid=16966639 }}</ref> However, as of 2017, embedded Java is no longer common and no realtime Java chip vendors exist.<ref>{{cite web \|title=Systronix Home \|url=http://www.systronix.com/ \|website=www.systronix.com \|access-date=6 June 2022 \|archive-url=https://web.archive.org/web/20170818062055/http://www.systronix.com/ \|archive-date=18 August 2017}}</ref>		A '''Java processor''' is the implementation of the [[Java virtual machine]] (JVM) in hardware. In other words, the [[Java bytecode]] that makes up the instruction set of the abstract machine becomes the instruction set of a concrete machine. These were the most popular form of a [[high-level language computer architecture]], and were "an attractive choice for building embedded and real-time systems that are programmed in Java".<ref name=Binder>{{cite book \|last1=Binder \|first1=Walter \|last2=Schoeberl \|first2=Martin \|last3=Moret \|first3=Philippe \|last4=Villazon \|first4=Alex \|title=2008 Fifth International Conference on Quantitative Evaluation of Systems \|chapter=Cross-Profiling for Embedded Java Processors \|date=September 2008 \|pages=287–296 \|doi=10.1109/QEST.2008.39\|isbn=978-0-7695-3360-5 \|s2cid=16966639 }}</ref> However, as of 2017, embedded Java is no longer common and no realtime Java chip vendors exist.<ref>{{cite web \|title=Systronix Home \|url=http://www.systronix.com/ \|website=www.systronix.com \|access-date=6 June 2022 \|archive-url=https://web.archive.org/web/20170818062055/http://www.systronix.com/ \|archive-date=18 August 2017}}</ref>

Starryuwu: More formal wording

2024-06-26T03:33:11Z

More formal wording

← Previous revision		Revision as of 03:33, 26 June 2024
Line 1:		Line 1:
	A '''Java processor''' is the implementation of the [[Java virtual machine]] (JVM) in hardware. In other words, the [[Java bytecode]] that makes up the instruction set of the abstract machine becomes the instruction set of a concrete machine. These were the most popular form of a [[high-level language computer architecture]], and were "an attractive choice for building embedded and real-time systems that are programmed in Java".<ref name=Binder>{{cite book \|last1=Binder \|first1=Walter \|last2=Schoeberl \|first2=Martin \|last3=Moret \|first3=Philippe \|last4=Villazon \|first4=Alex \|title=2008 Fifth International Conference on Quantitative Evaluation of Systems \|chapter=Cross-Profiling for Embedded Java Processors \|date=September 2008 \|pages=287–296 \|doi=10.1109/QEST.2008.39\|isbn=978-0-7695-3360-5 \|s2cid=16966639 }}</ref> However, as of 2017, embedded Java is ~~"pretty~~ ~~much~~ ~~dead"~~ and no realtime Java chip vendors exist.<ref>{{cite web \|title=Systronix Home \|url=http://www.systronix.com/ \|website=www.systronix.com \|access-date=6 June 2022 \|archive-url=https://web.archive.org/web/20170818062055/http://www.systronix.com/ \|archive-date=18 August 2017}}</ref>		A '''Java processor''' is the implementation of the [[Java virtual machine]] (JVM) in hardware. In other words, the [[Java bytecode]] that makes up the instruction set of the abstract machine becomes the instruction set of a concrete machine. These were the most popular form of a [[high-level language computer architecture]], and were "an attractive choice for building embedded and real-time systems that are programmed in Java".<ref name=Binder>{{cite book \|last1=Binder \|first1=Walter \|last2=Schoeberl \|first2=Martin \|last3=Moret \|first3=Philippe \|last4=Villazon \|first4=Alex \|title=2008 Fifth International Conference on Quantitative Evaluation of Systems \|chapter=Cross-Profiling for Embedded Java Processors \|date=September 2008 \|pages=287–296 \|doi=10.1109/QEST.2008.39\|isbn=978-0-7695-3360-5 \|s2cid=16966639 }}</ref> However, as of 2017, embedded Java is no longer common and no realtime Java chip vendors exist.<ref>{{cite web \|title=Systronix Home \|url=http://www.systronix.com/ \|website=www.systronix.com \|access-date=6 June 2022 \|archive-url=https://web.archive.org/web/20170818062055/http://www.systronix.com/ \|archive-date=18 August 2017}}</ref>

	== Implementations ==		== Implementations ==
Line 10:		Line 10:
	Some commercial implementations included:		Some commercial implementations included:
	* The aJile processor was the most successful [[ASIC]] Java processor.<ref name=Binder/>		* The aJile processor was the most successful [[ASIC]] Java processor.<ref name=Binder/>
	* Cjip from Imsys Technologies. Available on boards and with wireless radios from AVIDwireless<ref>"Imsys hedges bets on Java: [[~~microcode~~#Writable control store\| rewritable-microcode]] chip has instruction sets for Java, Forth, C/C++"]		* Cjip from Imsys Technologies. Available on boards and with wireless radios from AVIDwireless<ref>"Imsys hedges bets on Java: [[Microcode#Writable control store\| rewritable-microcode]] chip has instruction sets for Java, Forth, C/C++"]
	by Tom R. Halfhill		by Tom R. Halfhill
	[http://www.imsystech.com/press_room/press_archive/press_micro_p_report.pdf] {{Webarchive\|url=https://web.archive.org/web/20081119232421/http://www.imsystech.com/press_room/press_archive/press_micro_p_report.pdf \|date=2008-11-19 }}</ref>		[http://www.imsystech.com/press_room/press_archive/press_micro_p_report.pdf] {{Webarchive\|url=https://web.archive.org/web/20081119232421/http://www.imsystech.com/press_room/press_archive/press_micro_p_report.pdf\|date=2008-11-19}}</ref>
	* [[ARM9E\|ARM926EJ-S]] was an ARM processor able to run Java bytecode, this technology being named ''[[Jazelle]]''.		* [[ARM9E\|ARM926EJ-S]] was an ARM processor able to run Java bytecode, this technology being named ''[[Jazelle]]''.

OAbot: Open access bot: hdl updated in citation with #oabot.

2024-04-01T03:55:41Z

Open access bot: hdl updated in citation with #oabot.

← Previous revision		Revision as of 03:55, 1 April 2024
Line 6:		Line 6:
	*[[picoJava]] was the first attempt to build a Java processor, by [[Sun Microsystems]]. Its successor picoJava-II was freely available under the [[Sun Community Source License]],<ref name=Binder/> and is still available from some archives.		*[[picoJava]] was the first attempt to build a Java processor, by [[Sun Microsystems]]. Its successor picoJava-II was freely available under the [[Sun Community Source License]],<ref name=Binder/> and is still available from some archives.
	*{{Proper name\|jHISC}}<ref>{{Cite journal\| doi = 10.1016/j.micpro.2005.12.007\| title = A Java processor with hardware-support object-oriented instructions\| year = 2006\| last1 = Yiyu \| first1 = T.\| last2 = Wanyiu \| first2 = L.\| last3 = Chihang \| first3 = Y.\| last4 = Li \| first4 = R.\| last5 = Fong \| first5 = A.\| journal = Microprocessors and Microsystems\| volume = 30\| issue = 8\| pages = 469 }}</ref> provides hardware support for object-oriented functions		*{{Proper name\|jHISC}}<ref>{{Cite journal\| doi = 10.1016/j.micpro.2005.12.007\| title = A Java processor with hardware-support object-oriented instructions\| year = 2006\| last1 = Yiyu \| first1 = T.\| last2 = Wanyiu \| first2 = L.\| last3 = Chihang \| first3 = Y.\| last4 = Li \| first4 = R.\| last5 = Fong \| first5 = A.\| journal = Microprocessors and Microsystems\| volume = 30\| issue = 8\| pages = 469 }}</ref> provides hardware support for object-oriented functions
	*[[Java Optimized Processor]]<ref>{{Cite journal\| first1 = M.\| title = A Java processor architecture for embedded real-time systems\| last1 = Schoeberl\| journal = Journal of Systems Architecture\| volume = 54\| issue = 1–2\| pages = 265–286\| year = 2008 \| doi = 10.1016/j.sysarc.2007.06.001\| citeseerx = 10.1.1.68.8757}}</ref> for [[FPGA]]s. A PhD thesis is [https://web.archive.org/web/20120204093123/http://www.jopdesign.com/thesis/index.jsp available], and it has been used in several commercial applications.<ref name=Binder/> In 2019 it was extended to be energy aware (EAJOP).<ref>{{cite journal \|last1=Tewary \|first1=Manish \|last2=Malik \|first2=Avinash \|last3=Salcic \|first3=Zoran \|last4=Biglari-Abhari \|first4=Morteza \|title=An Energy Efficient Embedded Processor for Hard Real-Time Java Applications \|journal=Architecture of Computing Systems – ARCS 2019 \|series=Lecture Notes in Computer Science \|date=2019 \|volume=11479 \|pages=281–292 \|doi=10.1007/978-3-030-18656-2_21\|isbn=978-3-030-18655-5 \|s2cid=153311249 }}</ref>		*[[Java Optimized Processor]]<ref>{{Cite journal\| first1 = M.\| title = A Java processor architecture for embedded real-time systems\| last1 = Schoeberl\| journal = Journal of Systems Architecture\| volume = 54\| issue = 1–2\| pages = 265–286\| year = 2008 \| doi = 10.1016/j.sysarc.2007.06.001\| citeseerx = 10.1.1.68.8757}}</ref> for [[FPGA]]s. A PhD thesis is [https://web.archive.org/web/20120204093123/http://www.jopdesign.com/thesis/index.jsp available], and it has been used in several commercial applications.<ref name=Binder/> In 2019 it was extended to be energy aware (EAJOP).<ref>{{cite journal \|last1=Tewary \|first1=Manish \|last2=Malik \|first2=Avinash \|last3=Salcic \|first3=Zoran \|last4=Biglari-Abhari \|first4=Morteza \|title=An Energy Efficient Embedded Processor for Hard Real-Time Java Applications \|journal=Architecture of Computing Systems – ARCS 2019 \|series=Lecture Notes in Computer Science \|date=2019 \|volume=11479 \|pages=281–292 \|doi=10.1007/978-3-030-18656-2_21\|isbn=978-3-030-18655-5 \|s2cid=153311249 \|hdl=2292/62302 \|hdl-access=free }}</ref>

	Some commercial implementations included:		Some commercial implementations included:

JohnGDallman: /* Implementations */ Tidy layout, Jazelle is past-tense.

2023-11-03T21:55:51Z

Implementations: Tidy layout, Jazelle is past-tense.

← Previous revision		Revision as of 21:55, 3 November 2023
Line 10:		Line 10:
	Some commercial implementations included:		Some commercial implementations included:
	* The aJile processor was the most successful [[ASIC]] Java processor.<ref name=Binder/>		* The aJile processor was the most successful [[ASIC]] Java processor.<ref name=Binder/>
	*Cjip from Imsys Technologies. Available on boards and with wireless radios from AVIDwireless<ref>"Imsys hedges bets on Java: [[microcode#Writable control store\| rewritable-microcode]] chip has instruction sets for Java, Forth, C/C++"]		* Cjip from Imsys Technologies. Available on boards and with wireless radios from AVIDwireless<ref>"Imsys hedges bets on Java: [[microcode#Writable control store\| rewritable-microcode]] chip has instruction sets for Java, Forth, C/C++"]
	by Tom R. Halfhill		by Tom R. Halfhill
	[http://www.imsystech.com/press_room/press_archive/press_micro_p_report.pdf] {{Webarchive\|url=https://web.archive.org/web/20081119232421/http://www.imsystech.com/press_room/press_archive/press_micro_p_report.pdf \|date=2008-11-19 }}</ref>		[http://www.imsystech.com/press_room/press_archive/press_micro_p_report.pdf] {{Webarchive\|url=https://web.archive.org/web/20081119232421/http://www.imsystech.com/press_room/press_archive/press_micro_p_report.pdf \|date=2008-11-19 }}</ref>
	*[[ARM9E\|ARM926EJ-S]] is an ARM processor able to run Java bytecode, this technology being named ''[[Jazelle]]''		* [[ARM9E\|ARM926EJ-S]] was an ARM processor able to run Java bytecode, this technology being named ''[[Jazelle]]''.

	==See also==		==See also==

Cewbot: Fixing broken anchor: 2015-01-22 #Writable_control_stores →Microcode#Writable control store

2023-07-25T06:17:28Z

Fixing broken anchor: 2015-01-22 #Writable_control_stores →Microcode#Writable control store

← Previous revision		Revision as of 06:17, 25 July 2023
Line 10:		Line 10:
	Some commercial implementations included:		Some commercial implementations included:
	* The aJile processor was the most successful [[ASIC]] Java processor.<ref name=Binder/>		* The aJile processor was the most successful [[ASIC]] Java processor.<ref name=Binder/>
	*Cjip from Imsys Technologies. Available on boards and with wireless radios from AVIDwireless<ref>"Imsys hedges bets on Java: [[microcode#~~Writable_control_stores~~ \| rewritable-microcode]] chip has instruction sets for Java, Forth, C/C++"]		*Cjip from Imsys Technologies. Available on boards and with wireless radios from AVIDwireless<ref>"Imsys hedges bets on Java: [[microcode#Writable control store\| rewritable-microcode]] chip has instruction sets for Java, Forth, C/C++"]
	by Tom R. Halfhill		by Tom R. Halfhill
	[http://www.imsystech.com/press_room/press_archive/press_micro_p_report.pdf] {{Webarchive\|url=https://web.archive.org/web/20081119232421/http://www.imsystech.com/press_room/press_archive/press_micro_p_report.pdf \|date=2008-11-19 }}</ref>		[http://www.imsystech.com/press_room/press_archive/press_micro_p_report.pdf] {{Webarchive\|url=https://web.archive.org/web/20081119232421/http://www.imsystech.com/press_room/press_archive/press_micro_p_report.pdf \|date=2008-11-19 }}</ref>

Citation bot: Alter: title, template type. Add: chapter. Removed parameters. | Use this bot. Report bugs. | Suggested by Headbomb | Linked from Wikipedia:WikiProject_Academic_Journals/Journals_cited_by_Wikipedia/Sandbox2 | #UCB_webform_linked 674/2384

2023-07-24T02:57:51Z

Alter: title, template type. Add: chapter. Removed parameters. | Use this bot. Report bugs. | Suggested by Headbomb | Linked from Wikipedia:WikiProject_Academic_Journals/Journals_cited_by_Wikipedia/Sandbox2 | #UCB_webform_linked 674/2384

← Previous revision		Revision as of 02:57, 24 July 2023
Line 1:		Line 1:
	A '''Java processor''' is the implementation of the [[Java virtual machine]] (JVM) in hardware. In other words, the [[Java bytecode]] that makes up the instruction set of the abstract machine becomes the instruction set of a concrete machine. These were the most popular form of a [[high-level language computer architecture]], and were "an attractive choice for building embedded and real-time systems that are programmed in Java".<ref name=Binder>{{cite ~~journal~~ \|last1=Binder \|first1=Walter \|last2=Schoeberl \|first2=Martin \|last3=Moret \|first3=Philippe \|last4=Villazon \|first4=Alex \|title~~=Cross-Profiling for Embedded Java Processors \|journal~~=2008 Fifth International Conference on Quantitative Evaluation of Systems \|date=September 2008 \|pages=287–296 \|doi=10.1109/QEST.2008.39\|isbn=978-0-7695-3360-5 \|s2cid=16966639 }}</ref> However, as of 2017, embedded Java is "pretty much dead" and no realtime Java chip vendors exist.<ref>{{cite web \|title=Systronix Home \|url=http://www.systronix.com/ \|website=www.systronix.com \|access-date=6 June 2022 \|archive-url=https://web.archive.org/web/20170818062055/http://www.systronix.com/ \|archive-date=18 August 2017}}</ref>		A '''Java processor''' is the implementation of the [[Java virtual machine]] (JVM) in hardware. In other words, the [[Java bytecode]] that makes up the instruction set of the abstract machine becomes the instruction set of a concrete machine. These were the most popular form of a [[high-level language computer architecture]], and were "an attractive choice for building embedded and real-time systems that are programmed in Java".<ref name=Binder>{{cite book \|last1=Binder \|first1=Walter \|last2=Schoeberl \|first2=Martin \|last3=Moret \|first3=Philippe \|last4=Villazon \|first4=Alex \|title=2008 Fifth International Conference on Quantitative Evaluation of Systems \|chapter=Cross-Profiling for Embedded Java Processors \|date=September 2008 \|pages=287–296 \|doi=10.1109/QEST.2008.39\|isbn=978-0-7695-3360-5 \|s2cid=16966639 }}</ref> However, as of 2017, embedded Java is "pretty much dead" and no realtime Java chip vendors exist.<ref>{{cite web \|title=Systronix Home \|url=http://www.systronix.com/ \|website=www.systronix.com \|access-date=6 June 2022 \|archive-url=https://web.archive.org/web/20170818062055/http://www.systronix.com/ \|archive-date=18 August 2017}}</ref>

	== Implementations ==		== Implementations ==

Artoria2e5 at 23:57, 2 April 2023

2023-04-02T23:57:39Z

← Previous revision		Revision as of 23:57, 2 April 2023
Line 14:		Line 14:
	[http://www.imsystech.com/press_room/press_archive/press_micro_p_report.pdf] {{Webarchive\|url=https://web.archive.org/web/20081119232421/http://www.imsystech.com/press_room/press_archive/press_micro_p_report.pdf \|date=2008-11-19 }}</ref>		[http://www.imsystech.com/press_room/press_archive/press_micro_p_report.pdf] {{Webarchive\|url=https://web.archive.org/web/20081119232421/http://www.imsystech.com/press_room/press_archive/press_micro_p_report.pdf \|date=2008-11-19 }}</ref>
	*[[ARM9E\|ARM926EJ-S]] is an ARM processor able to run Java bytecode, this technology being named ''[[Jazelle]]''		*[[ARM9E\|ARM926EJ-S]] is an ARM processor able to run Java bytecode, this technology being named ''[[Jazelle]]''

			==See also==
			* [[Java Card]]

	==References==		==References==

Citation bot: Add: series, s2cid, isbn. | Use this bot. Report bugs. | Suggested by Whoop whoop pull up | #UCB_webform 2771/3352

2023-03-27T14:41:11Z

Add: series, s2cid, isbn. | Use this bot. Report bugs. | Suggested by Whoop whoop pull up | #UCB_webform 2771/3352

← Previous revision		Revision as of 14:41, 27 March 2023
Line 1:		Line 1:
	A '''Java processor''' is the implementation of the [[Java virtual machine]] (JVM) in hardware. In other words, the [[Java bytecode]] that makes up the instruction set of the abstract machine becomes the instruction set of a concrete machine. These were the most popular form of a [[high-level language computer architecture]], and were "an attractive choice for building embedded and real-time systems that are programmed in Java".<ref name=Binder>{{cite journal \|last1=Binder \|first1=Walter \|last2=Schoeberl \|first2=Martin \|last3=Moret \|first3=Philippe \|last4=Villazon \|first4=Alex \|title=Cross-Profiling for Embedded Java Processors \|journal=2008 Fifth International Conference on Quantitative Evaluation of Systems \|date=September 2008 \|pages=287–296 \|doi=10.1109/QEST.2008.39}}</ref> However, as of 2017, embedded Java is "pretty much dead" and no realtime Java chip vendors exist.<ref>{{cite web \|title=Systronix Home \|url=http://www.systronix.com/ \|website=www.systronix.com \|access-date=6 June 2022 \|archive-url=https://web.archive.org/web/20170818062055/http://www.systronix.com/ \|archive-date=18 August 2017}}</ref>		A '''Java processor''' is the implementation of the [[Java virtual machine]] (JVM) in hardware. In other words, the [[Java bytecode]] that makes up the instruction set of the abstract machine becomes the instruction set of a concrete machine. These were the most popular form of a [[high-level language computer architecture]], and were "an attractive choice for building embedded and real-time systems that are programmed in Java".<ref name=Binder>{{cite journal \|last1=Binder \|first1=Walter \|last2=Schoeberl \|first2=Martin \|last3=Moret \|first3=Philippe \|last4=Villazon \|first4=Alex \|title=Cross-Profiling for Embedded Java Processors \|journal=2008 Fifth International Conference on Quantitative Evaluation of Systems \|date=September 2008 \|pages=287–296 \|doi=10.1109/QEST.2008.39\|isbn=978-0-7695-3360-5 \|s2cid=16966639 }}</ref> However, as of 2017, embedded Java is "pretty much dead" and no realtime Java chip vendors exist.<ref>{{cite web \|title=Systronix Home \|url=http://www.systronix.com/ \|website=www.systronix.com \|access-date=6 June 2022 \|archive-url=https://web.archive.org/web/20170818062055/http://www.systronix.com/ \|archive-date=18 August 2017}}</ref>

	== Implementations ==		== Implementations ==
Line 6:		Line 6:
	*[[picoJava]] was the first attempt to build a Java processor, by [[Sun Microsystems]]. Its successor picoJava-II was freely available under the [[Sun Community Source License]],<ref name=Binder/> and is still available from some archives.		*[[picoJava]] was the first attempt to build a Java processor, by [[Sun Microsystems]]. Its successor picoJava-II was freely available under the [[Sun Community Source License]],<ref name=Binder/> and is still available from some archives.
	*{{Proper name\|jHISC}}<ref>{{Cite journal\| doi = 10.1016/j.micpro.2005.12.007\| title = A Java processor with hardware-support object-oriented instructions\| year = 2006\| last1 = Yiyu \| first1 = T.\| last2 = Wanyiu \| first2 = L.\| last3 = Chihang \| first3 = Y.\| last4 = Li \| first4 = R.\| last5 = Fong \| first5 = A.\| journal = Microprocessors and Microsystems\| volume = 30\| issue = 8\| pages = 469 }}</ref> provides hardware support for object-oriented functions		*{{Proper name\|jHISC}}<ref>{{Cite journal\| doi = 10.1016/j.micpro.2005.12.007\| title = A Java processor with hardware-support object-oriented instructions\| year = 2006\| last1 = Yiyu \| first1 = T.\| last2 = Wanyiu \| first2 = L.\| last3 = Chihang \| first3 = Y.\| last4 = Li \| first4 = R.\| last5 = Fong \| first5 = A.\| journal = Microprocessors and Microsystems\| volume = 30\| issue = 8\| pages = 469 }}</ref> provides hardware support for object-oriented functions
	*[[Java Optimized Processor]]<ref>{{Cite journal\| first1 = M.\| title = A Java processor architecture for embedded real-time systems\| last1 = Schoeberl\| journal = Journal of Systems Architecture\| volume = 54\| issue = 1–2\| pages = 265–286\| year = 2008 \| doi = 10.1016/j.sysarc.2007.06.001\| citeseerx = 10.1.1.68.8757}}</ref> for [[FPGA]]s. A PhD thesis is [https://web.archive.org/web/20120204093123/http://www.jopdesign.com/thesis/index.jsp available], and it has been used in several commercial applications.<ref name=Binder/> In 2019 it was extended to be energy aware (EAJOP).<ref>{{cite journal \|last1=Tewary \|first1=Manish \|last2=Malik \|first2=Avinash \|last3=Salcic \|first3=Zoran \|last4=Biglari-Abhari \|first4=Morteza \|title=An Energy Efficient Embedded Processor for Hard Real-Time Java Applications \|journal=Architecture of Computing Systems – ARCS 2019 \|date=2019 \|volume=11479 \|pages=281–292 \|doi=10.1007/978-3-030-18656-2_21}}</ref>		*[[Java Optimized Processor]]<ref>{{Cite journal\| first1 = M.\| title = A Java processor architecture for embedded real-time systems\| last1 = Schoeberl\| journal = Journal of Systems Architecture\| volume = 54\| issue = 1–2\| pages = 265–286\| year = 2008 \| doi = 10.1016/j.sysarc.2007.06.001\| citeseerx = 10.1.1.68.8757}}</ref> for [[FPGA]]s. A PhD thesis is [https://web.archive.org/web/20120204093123/http://www.jopdesign.com/thesis/index.jsp available], and it has been used in several commercial applications.<ref name=Binder/> In 2019 it was extended to be energy aware (EAJOP).<ref>{{cite journal \|last1=Tewary \|first1=Manish \|last2=Malik \|first2=Avinash \|last3=Salcic \|first3=Zoran \|last4=Biglari-Abhari \|first4=Morteza \|title=An Energy Efficient Embedded Processor for Hard Real-Time Java Applications \|journal=Architecture of Computing Systems – ARCS 2019 \|series=Lecture Notes in Computer Science \|date=2019 \|volume=11479 \|pages=281–292 \|doi=10.1007/978-3-030-18656-2_21\|isbn=978-3-030-18655-5 \|s2cid=153311249 }}</ref>

	Some commercial implementations included:		Some commercial implementations included:

Mathnerd314159: citations, all processors are dead except maybe JOP

2022-06-06T20:16:03Z

citations, all processors are dead except maybe JOP

← Previous revision		Revision as of 20:16, 6 June 2022
Line 1:		Line 1:
	A '''Java processor''' is the implementation of the [[Java virtual machine]] (JVM) in hardware. In other words, the [[Java bytecode]] that makes up the instruction set of the abstract machine becomes the instruction set of a concrete machine. These ~~are~~ the most popular form of a [[high-level language computer architecture]] ~~today~~.		A '''Java processor''' is the implementation of the [[Java virtual machine]] (JVM) in hardware. In other words, the [[Java bytecode]] that makes up the instruction set of the abstract machine becomes the instruction set of a concrete machine. These were the most popular form of a [[high-level language computer architecture]], and were "an attractive choice for building embedded and real-time systems that are programmed in Java".<ref name=Binder>{{cite journal \|last1=Binder \|first1=Walter \|last2=Schoeberl \|first2=Martin \|last3=Moret \|first3=Philippe \|last4=Villazon \|first4=Alex \|title=Cross-Profiling for Embedded Java Processors \|journal=2008 Fifth International Conference on Quantitative Evaluation of Systems \|date=September 2008 \|pages=287–296 \|doi=10.1109/QEST.2008.39}}</ref> However, as of 2017, embedded Java is "pretty much dead" and no realtime Java chip vendors exist.<ref>{{cite web \|title=Systronix Home \|url=http://www.systronix.com/ \|website=www.systronix.com \|access-date=6 June 2022 \|archive-url=https://web.archive.org/web/20170818062055/http://www.systronix.com/ \|archive-date=18 August 2017}}</ref>

	== Implementations ==		== Implementations ==
	There are ~~many~~ Java processors ~~available~~, including:		There are several research Java processors tested on FPGA, including:

	*[[picoJava]] was the first attempt by [[Sun Microsystems]] to ~~build~~ a ~~Java~~ ~~processor~~		*[[picoJava]] was the first attempt to build a Java processor, by [[Sun Microsystems]]. Its successor picoJava-II was freely available under the [[Sun Community Source License]],<ref name=Binder/> and is still available from some archives.
		⚫	*{{Proper name\|jHISC}}<ref>{{Cite journal\| doi = 10.1016/j.micpro.2005.12.007\| title = A Java processor with hardware-support object-oriented instructions\| year = 2006\| last1 = Yiyu \| first1 = T.\| last2 = Wanyiu \| first2 = L.\| last3 = Chihang \| first3 = Y.\| last4 = Li \| first4 = R.\| last5 = Fong \| first5 = A.\| journal = Microprocessors and Microsystems\| volume = 30\| issue = 8\| pages = 469 }}</ref> provides hardware support for object-oriented functions
		⚫	*[[Java Optimized Processor]]<ref>{{Cite journal\| first1 = M.\| title = A Java processor architecture for embedded real-time systems\| last1 = Schoeberl\| journal = Journal of Systems Architecture\| volume = 54\| issue = 1–2\| pages = 265–286\| year = 2008 \| doi = 10.1016/j.sysarc.2007.06.001\| citeseerx = 10.1.1.68.8757}}</ref> for [[FPGA]]s. A PhD thesis is [https://web.archive.org/web/20120204093123/http://www.jopdesign.com/thesis/index.jsp available], and it has been used in several commercial applications.<ref name=Binder/> In 2019 it was extended to be energy aware (EAJOP).<ref>{{cite journal \|last1=Tewary \|first1=Manish \|last2=Malik \|first2=Avinash \|last3=Salcic \|first3=Zoran \|last4=Biglari-Abhari \|first4=Morteza \|title=An Energy Efficient Embedded Processor for Hard Real-Time Java Applications \|journal=Architecture of Computing Systems – ARCS 2019 \|date=2019 \|volume=11479 \|pages=281–292 \|doi=10.1007/978-3-030-18656-2_21}}</ref>

			Some commercial implementations included:
			* The aJile processor was the most successful [[ASIC]] Java processor.<ref name=Binder/>
	*Cjip from Imsys Technologies. Available on boards and with wireless radios from AVIDwireless<ref>"Imsys hedges bets on Java: [[microcode#Writable_control_stores \| rewritable-microcode]] chip has instruction sets for Java, Forth, C/C++"]		*Cjip from Imsys Technologies. Available on boards and with wireless radios from AVIDwireless<ref>"Imsys hedges bets on Java: [[microcode#Writable_control_stores \| rewritable-microcode]] chip has instruction sets for Java, Forth, C/C++"]
	by Tom R. Halfhill		by Tom R. Halfhill
	[http://www.imsystech.com/press_room/press_archive/press_micro_p_report.pdf] {{Webarchive\|url=https://web.archive.org/web/20081119232421/http://www.imsystech.com/press_room/press_archive/press_micro_p_report.pdf \|date=2008-11-19 }}</ref>		[http://www.imsystech.com/press_room/press_archive/press_micro_p_report.pdf] {{Webarchive\|url=https://web.archive.org/web/20081119232421/http://www.imsystech.com/press_room/press_archive/press_micro_p_report.pdf \|date=2008-11-19 }}</ref>
	*[[ARM9E\|ARM926EJ-S]] is an ARM processor able to run Java bytecode, this technology being named ''[[Jazelle]]''		*[[ARM9E\|ARM926EJ-S]] is an ARM processor able to run Java bytecode, this technology being named ''[[Jazelle]]''
⚫	*[[Java Optimized Processor]]<ref>{{Cite journal\| first1 = M.\| title = A Java processor architecture for embedded real-time systems\| last1 = Schoeberl\| journal = Journal of Systems Architecture\| volume = 54\| issue = 1–2\| pages = 265–286\| year = 2008 \| doi = 10.1016/j.sysarc.2007.06.001\| citeseerx = 10.1.1.68.8757}}</ref> for [[FPGA]]s. A PhD thesis is [https://web.archive.org/web/20120204093123/http://www.jopdesign.com/thesis/index.jsp available]
⚫	*{{Proper name\|jHISC}}<ref>{{Cite journal\| doi = 10.1016/j.micpro.2005.12.007\| title = A Java processor with hardware-support object-oriented instructions\| year = 2006\| last1 = Yiyu \| first1 = T.\| last2 = Wanyiu \| first2 = L.\| last3 = Chihang \| first3 = Y.\| last4 = Li \| first4 = R.\| last5 = Fong \| first5 = A.\| journal = Microprocessors and Microsystems\| volume = 30\| issue = 8\| pages = 469 }}</ref> provides hardware support for object-oriented functions

	==References==		==References==

95.90.236.83: /* Java processor */ Fixed grammar

2021-03-07T12:46:54Z

Java processor: Fixed grammar

← Previous revision		Revision as of 12:46, 7 March 2021
Line 1:		Line 1:
	A '''Java processor''' is the implementation of the [[Java virtual machine]] (JVM) in hardware. In other words, the [[Java bytecode]] that makes up the instruction set of the abstract machine becomes the instruction set of a concrete machine. These are ~~today~~ the most popular form of a [[high-level language computer architecture]].		A '''Java processor''' is the implementation of the [[Java virtual machine]] (JVM) in hardware. In other words, the [[Java bytecode]] that makes up the instruction set of the abstract machine becomes the instruction set of a concrete machine. These are the most popular form of a [[high-level language computer architecture]] today.

	== Implementations ==		== Implementations ==