Memory Reference Code - Revision history

Guerreroast: Clean up

2024-06-16T09:34:13Z

Clean up

← Previous revision		Revision as of 09:34, 16 June 2024
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			{{Short description\|Component in computer design}}
⚫	The '''Memory Reference Code''' (or '''MRC''') is a fundamental component in the design of some computers, and is "one of the most important aspects of the [[BIOS]]" for an [[Intel]]-based [[motherboard]].<ref name="Life and Times">{{cite web\|last=Posted by Alex Watson, possibly repost from original content on custompc.com [unclear]\|title=The life and times of the modern motherboard\|url=http://www.bit-tech.net/custompc/features/601716/the-life-and-times-of-the-modern-motherboard/page1.html\|work=2007-11-27\|accessdate=2 February 2013}}</ref>{{rp\|8}} It is the part of an Intel motherboard's [[firmware]] that determines how the [[computer memory\|computer's memory]] ([[RAM]]) will be initialized, and adjusts [[memory timing]] [[algorithm]]s correctly for the effects of any modifications set by the user or [[computer hardware]].

		⚫	The '''Memory Reference Code''' ('''MRC''') is a fundamental component in the design of some computers, and is "one of the most important aspects of the [[BIOS]]" for an [[Intel]]-based [[motherboard]].<ref name="Life and Times">{{cite web\|last=Posted by Alex Watson, possibly repost from original content on custompc.com [unclear]\|title=The life and times of the modern motherboard\|url=http://www.bit-tech.net/custompc/features/601716/the-life-and-times-of-the-modern-motherboard/page1.html\|work=2007-11-27\|accessdate=2 February 2013}}</ref>{{rp\|8}} It is the part of an Intel motherboard's [[firmware]] that determines how the [[computer memory\|computer's memory]] ([[RAM]]) will be initialized, and adjusts [[memory timing]] [[algorithm]]s correctly for the effects of any modifications set by the user or [[computer hardware]].

	== Overview ==		== Overview ==
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	[[Intel]] has defined the Memory Reference Code (MRC) as follows:<ref>{{cite web\|author=David Hilber Jr.\|title=Considerations for Designing an Embedded Intel Architecture System with System Memory Down ®\|url=http://www.intel.com/content/dam/www/public/us/en/documents/white-papers/ia-system-memory-down-paper.pdf\|publisher=[[Intel]]\|accessdate=14 April 2015\|date=August 2009}}</ref>		[[Intel]] has defined the Memory Reference Code (MRC) as follows:<ref>{{cite web\|author=David Hilber Jr.\|title=Considerations for Designing an Embedded Intel Architecture System with System Memory Down ®\|url=http://www.intel.com/content/dam/www/public/us/en/documents/white-papers/ia-system-memory-down-paper.pdf\|publisher=[[Intel]]\|accessdate=14 April 2015\|date=August 2009}}</ref>

	<blockquote>The MRC is responsible for initializing the memory as part of the [[Power-on self-test\|POST]] process at power-on. Intel provides support in the MRC for all fully validated memory configurations. For non-validated configurations, a system designer should work with their [[BIOS]] vendor to produce a working MRC solution ... The MRC in the system BIOS needs to know the specification of the attached system memory. Most of this info should be contained in the onboard [[Serial presence detect\|SPD]]. With this in mind care needs to be taken when programming the appropriate values into the SPD [the part of a [[memory module]] that contains its operating requirements and specification]. A system designer should work with their memory and BIOS vendors to implement a suitable SPD programming.</blockquote>		<blockquote>The MRC is responsible for initializing the memory as part of the [[Power-on self-test\|POST]] process at power-on. Intel provides support in the MRC for all fully validated memory configurations. For non-validated configurations, a system designer should work with their [[BIOS]] vendor to produce a working MRC solution ... The MRC in the system BIOS needs to know the specification of the attached system memory. Most of this info should be contained in the onboard [[Serial presence detect\|SPD]]. With this in mind care needs to be taken when programming the appropriate values into the SPD [the part of a [[memory module]] that contains its operating requirements and specification]. A system designer should work with their memory and BIOS vendors to implement a suitable SPD programming.</blockquote>

	As such, the MRC is a part of the BIOS (or [[firmware]]) of an [[Intel]] [[motherboard]]. George Chen, a [[research and development]] (R&D) director at [[ASUS]], described it in 2007 as follows:<ref name="Life and Times" />		As such, the MRC is a part of the BIOS (or [[firmware]]) of an [[Intel]] [[motherboard]]. George Chen, a [[research and development]] (R&D) director at [[ASUS]], described it in 2007 as follows:<ref name="Life and Times" />

Citation bot: Alter: title. | Use this bot. Report bugs. | Suggested by Whoop whoop pull up | #UCB_webform 3178/3352

2023-03-27T15:57:55Z

Alter: title. | Use this bot. Report bugs. | Suggested by Whoop whoop pull up | #UCB_webform 3178/3352

← Previous revision		Revision as of 15:57, 27 March 2023
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	== Overview ==		== Overview ==

	[[Intel]] has defined the Memory Reference Code (MRC) as follows:<ref>{{cite web\|author=David Hilber Jr.\|title=Considerations for Designing an Embedded Intel Architecture System with System Memory Down ®\|url=http://www.intel.com/content/dam/www/public/us/en/documents/white-papers/ia-system-memory-down-paper.pdf\|publisher=[[Intel]]\|accessdate=14 April 2015\|date=August 2009}}</ref>		[[Intel]] has defined the Memory Reference Code (MRC) as follows:<ref>{{cite web\|author=David Hilber Jr.\|title=Considerations for Designing an Embedded Intel Architecture System with System Memory Down ®\|url=http://www.intel.com/content/dam/www/public/us/en/documents/white-papers/ia-system-memory-down-paper.pdf\|publisher=[[Intel]]\|accessdate=14 April 2015\|date=August 2009}}</ref>

	<blockquote>The MRC is responsible for initializing the memory as part of the [[Power-on self-test\|POST]] process at power-on. Intel provides support in the MRC for all fully validated memory configurations. For non-validated configurations, a system designer should work with their [[BIOS]] vendor to produce a working MRC solution ... The MRC in the system BIOS needs to know the specification of the attached system memory. Most of this info should be contained in the onboard [[Serial presence detect\|SPD]]. With this in mind care needs to be taken when programming the appropriate values into the SPD [the part of a [[memory module]] that contains its operating requirements and specification]. A system designer should work with their memory and BIOS vendors to implement a suitable SPD programming.</blockquote>		<blockquote>The MRC is responsible for initializing the memory as part of the [[Power-on self-test\|POST]] process at power-on. Intel provides support in the MRC for all fully validated memory configurations. For non-validated configurations, a system designer should work with their [[BIOS]] vendor to produce a working MRC solution ... The MRC in the system BIOS needs to know the specification of the attached system memory. Most of this info should be contained in the onboard [[Serial presence detect\|SPD]]. With this in mind care needs to be taken when programming the appropriate values into the SPD [the part of a [[memory module]] that contains its operating requirements and specification]. A system designer should work with their memory and BIOS vendors to implement a suitable SPD programming.</blockquote>

Vedbas: fix

2021-06-26T17:34:13Z

fix

← Previous revision		Revision as of 17:34, 26 June 2021
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	==References==		==References==
			{{Reflist}}
	<references />

	[[Category:BIOS]]		[[Category:BIOS]]

SdkbBot: /* Overview */removed erroneous space

2021-06-04T18:58:07Z

Overview: removed erroneous space

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	<blockquote>The MRC usually only provides support for industry-standard memory configurations. For instance, under a 1,066MHz [[Front Side Bus\|FSB]], the only choices regarding memory speed in the MRC are [[DDR2 SDRAM\|DDR2]]-667 and DDR2-800. We have to provide additional choices. For people who want higher memory frequency, we used the setting of 800MHz FSB:DDR2-800 in MRC, but overclocked it to work with a 1,066MHz FSB, so we could implement support for DDR2-1066.</blockquote>		<blockquote>The MRC usually only provides support for industry-standard memory configurations. For instance, under a 1,066MHz [[Front Side Bus\|FSB]], the only choices regarding memory speed in the MRC are [[DDR2 SDRAM\|DDR2]]-667 and DDR2-800. We have to provide additional choices. For people who want higher memory frequency, we used the setting of 800MHz FSB:DDR2-800 in MRC, but overclocked it to work with a 1,066MHz FSB, so we could implement support for DDR2-1066.</blockquote>

	The article author describes the MRC as "One of the most important aspects of the BIOS for an Intel board" and the reason why "one [board might be] a brilliant [[overclocking\|overclocker]] and another [is] as stable as a plate of jelly on a bouncy castle"; adding that "When you're overclocking, you're literally running clocks faster than normal. Working out the effect of this on the various different components on the board is a task that a good BIOS must be able to handle." <ref name="Life and Times" />		The article author describes the MRC as "One of the most important aspects of the BIOS for an Intel board" and the reason why "one [board might be] a brilliant [[overclocking\|overclocker]] and another [is] as stable as a plate of jelly on a bouncy castle"; adding that "When you're overclocking, you're literally running clocks faster than normal. Working out the effect of this on the various different components on the board is a task that a good BIOS must be able to handle."<ref name="Life and Times" />

	== See also ==		== See also ==

84.250.12.111: /* Overview */ Replace definition lists with blockquotes

2021-03-07T01:54:11Z

Overview: Replace definition lists with blockquotes

← Previous revision		Revision as of 01:54, 7 March 2021
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	[[Intel]] has defined the Memory Reference Code (MRC) as follows:<ref>{{cite web\|author=David Hilber Jr.\|title=Considerations for Designing an Embedded Intel Architecture System with System Memory Down ®\|url=http://www.intel.com/content/dam/www/public/us/en/documents/white-papers/ia-system-memory-down-paper.pdf\|publisher=[[Intel]]\|accessdate=14 April 2015\|date=August 2009}}</ref>		[[Intel]] has defined the Memory Reference Code (MRC) as follows:<ref>{{cite web\|author=David Hilber Jr.\|title=Considerations for Designing an Embedded Intel Architecture System with System Memory Down ®\|url=http://www.intel.com/content/dam/www/public/us/en/documents/white-papers/ia-system-memory-down-paper.pdf\|publisher=[[Intel]]\|accessdate=14 April 2015\|date=August 2009}}</ref>

	~~: "~~The MRC is responsible for initializing the memory as part of the [[Power-on self-test\|POST]] process at power-on. Intel provides support in the MRC for all fully validated memory configurations. For non-validated configurations, a system designer should work with their [[BIOS]] vendor to produce a working MRC solution ... The MRC in the system BIOS needs to know the specification of the attached system memory. Most of this info should be contained in the onboard [[Serial presence detect\|SPD]]. With this in mind care needs to be taken when programming the appropriate values into the SPD [the part of a [[memory module]] that contains its operating requirements and specification]. A system designer should work with their memory and BIOS vendors to implement a suitable SPD programming."		<blockquote>The MRC is responsible for initializing the memory as part of the [[Power-on self-test\|POST]] process at power-on. Intel provides support in the MRC for all fully validated memory configurations. For non-validated configurations, a system designer should work with their [[BIOS]] vendor to produce a working MRC solution ... The MRC in the system BIOS needs to know the specification of the attached system memory. Most of this info should be contained in the onboard [[Serial presence detect\|SPD]]. With this in mind care needs to be taken when programming the appropriate values into the SPD [the part of a [[memory module]] that contains its operating requirements and specification]. A system designer should work with their memory and BIOS vendors to implement a suitable SPD programming.</blockquote>

	As such, the MRC is a part of the BIOS (or [[firmware]]) of an [[Intel]] [[motherboard]]. George Chen, a [[research and development]] (R&D) director at [[ASUS]], described it in 2007 as follows:<ref name="Life and Times" />		As such, the MRC is a part of the BIOS (or [[firmware]]) of an [[Intel]] [[motherboard]]. George Chen, a [[research and development]] (R&D) director at [[ASUS]], described it in 2007 as follows:<ref name="Life and Times" />
	~~: "~~The MRC is part of reference BIOS code, which relates to memory initialization in the BIOS. It includes information about memory settings, frequency, timing, driving and detailed operations of the memory controller. The MRC is written in a [[C (computer language)\|C-language]] code, which can be edited and [[compiler\|compiled]] by board makers. It provides a space to develop advanced features, and the ability to tune memory. We try to look into [Intel's] Memory Reference Code to try to understand its behaviour ... Sometimes, there are some remarks inside the source code, while on other occasions, we just try to change the arguments to see what effect it has. If we take the time to understand the MRC then we can get more out of it. If we put in more effort than our competitors, we can find more information."		<blockquote>The MRC is part of reference BIOS code, which relates to memory initialization in the BIOS. It includes information about memory settings, frequency, timing, driving and detailed operations of the memory controller. The MRC is written in a [[C (computer language)\|C-language]] code, which can be edited and [[compiler\|compiled]] by board makers. It provides a space to develop advanced features, and the ability to tune memory. We try to look into [Intel's] Memory Reference Code to try to understand its behaviour ... Sometimes, there are some remarks inside the source code, while on other occasions, we just try to change the arguments to see what effect it has. If we take the time to understand the MRC then we can get more out of it. If we put in more effort than our competitors, we can find more information.</blockquote>

	~~: "~~The MRC usually only provides support for industry-standard memory configurations. For instance, under a 1,066MHz [[Front Side Bus\|FSB]], the only choices regarding memory speed in the MRC are [[DDR2 SDRAM\|DDR2]]-667 and DDR2-800. We have to provide additional choices. For people who want higher memory frequency, we used the setting of 800MHz FSB:DDR2-800 in MRC, but overclocked it to work with a 1,066MHz FSB, so we could implement support for DDR2-1066."		<blockquote>The MRC usually only provides support for industry-standard memory configurations. For instance, under a 1,066MHz [[Front Side Bus\|FSB]], the only choices regarding memory speed in the MRC are [[DDR2 SDRAM\|DDR2]]-667 and DDR2-800. We have to provide additional choices. For people who want higher memory frequency, we used the setting of 800MHz FSB:DDR2-800 in MRC, but overclocked it to work with a 1,066MHz FSB, so we could implement support for DDR2-1066.</blockquote>

	The article author describes the MRC as "One of the most important aspects of the BIOS for an Intel board" and the reason why "one [board might be] a brilliant [[overclocking\|overclocker]] and another [is] as stable as a plate of jelly on a bouncy castle"; adding that "When you're overclocking, you're literally running clocks faster than normal. Working out the effect of this on the various different components on the board is a task that a good BIOS must be able to handle." <ref name="Life and Times" />		The article author describes the MRC as "One of the most important aspects of the BIOS for an Intel board" and the reason why "one [board might be] a brilliant [[overclocking\|overclocker]] and another [is] as stable as a plate of jelly on a bouncy castle"; adding that "When you're overclocking, you're literally running clocks faster than normal. Working out the effect of this on the various different components on the board is a task that a good BIOS must be able to handle." <ref name="Life and Times" />

2600:1016:B114:64E:6806:2462:C525:D0B4: /* See also */Typo fix

2021-03-06T17:43:48Z

奧田95: /* Overview */

2020-12-03T10:43:25Z

Overview

← Previous revision		Revision as of 10:43, 3 December 2020
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	The article author describes the MRC as "One of the most important aspects of the BIOS for an Intel board" and the reason why "one [board might be] a brilliant [[overclocking\|overclocker]] and another [is] as stable as a plate of jelly on a bouncy castle"; adding that "When you're overclocking, you're literally running clocks faster than normal. Working out the effect of this on the various different components on the board is a task that a good BIOS must be able to handle." <ref name="Life and Times" />		The article author describes the MRC as "One of the most important aspects of the BIOS for an Intel board" and the reason why "one [board might be] a brilliant [[overclocking\|overclocker]] and another [is] as stable as a plate of jelly on a bouncy castle"; adding that "When you're overclocking, you're literally running clocks faster than normal. Working out the effect of this on the various different components on the board is a task that a good BIOS must be able to handle." <ref name="Life and Times" />

			== Seel also ==
			* [[AGESA]]

	==References==		==References==

奧田95 at 18:05, 2 October 2020

2020-10-02T18:05:01Z

← Previous revision		Revision as of 18:05, 2 October 2020
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	The '''Memory Reference Code''' (or '''MRC''') is a fundamental component in the design of some computers, and is "one of the most important aspects of the [[BIOS]]" for an [[Intel]]-based [[motherboard]].<ref name="Life and Times">{{cite web\|last=Posted by Alex Watson, possibly repost from original content on custompc.com [unclear]\|title=The life and times of the modern motherboard\|url=http://www.bit-tech.net/custompc/features/601716/the-life-and-times-of-the-modern-motherboard/page1.html\|work=2007-11-27\|accessdate=2 February 2013}}</ref>{{rp\|8}} It is the part of an Intel motherboard's [[firmware]] that determines how the [[computer memory\|computer's memory]] ([[RAM]]) will be ~~read and written~~, and adjusts [[memory timing]] [[algorithm]]s correctly for the effects of any modifications set by the user or [[computer hardware]].		The '''Memory Reference Code''' (or '''MRC''') is a fundamental component in the design of some computers, and is "one of the most important aspects of the [[BIOS]]" for an [[Intel]]-based [[motherboard]].<ref name="Life and Times">{{cite web\|last=Posted by Alex Watson, possibly repost from original content on custompc.com [unclear]\|title=The life and times of the modern motherboard\|url=http://www.bit-tech.net/custompc/features/601716/the-life-and-times-of-the-modern-motherboard/page1.html\|work=2007-11-27\|accessdate=2 February 2013}}</ref>{{rp\|8}} It is the part of an Intel motherboard's [[firmware]] that determines how the [[computer memory\|computer's memory]] ([[RAM]]) will be initialized, and adjusts [[memory timing]] [[algorithm]]s correctly for the effects of any modifications set by the user or [[computer hardware]].

	== Overview ==		== Overview ==

192.198.147.168: /* Overview */ fix typo

2020-07-08T00:41:59Z

Overview: fix typo

← Previous revision		Revision as of 00:41, 8 July 2020
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	As such, the MRC is a part of the BIOS (or [[firmware]]) of an [[Intel]] [[motherboard]]. George Chen, a [[research and development]] (R&D) director at [[ASUS]], described it in 2007 as follows:<ref name="Life and Times" />		As such, the MRC is a part of the BIOS (or [[firmware]]) of an [[Intel]] [[motherboard]]. George Chen, a [[research and development]] (R&D) director at [[ASUS]], described it in 2007 as follows:<ref name="Life and Times" />
	: "The MRC is part of reference BIOS code, which relates to memory ~~initialisation~~ in the BIOS. It includes information about memory settings, frequency, timing, driving and detailed operations of the memory controller. The MRC is written in a [[C (computer language)\|C-language]] code, which can be edited and [[compiler\|compiled]] by board makers. It provides a space to develop advanced features, and the ability to tune memory. We try to look into [Intel's] Memory Reference Code to try to understand its behaviour ... Sometimes, there are some remarks inside the source code, while on other occasions, we just try to change the arguments to see what effect it has. If we take the time to understand the MRC then we can get more out of it. If we put in more effort than our competitors, we can find more information."		: "The MRC is part of reference BIOS code, which relates to memory initialization in the BIOS. It includes information about memory settings, frequency, timing, driving and detailed operations of the memory controller. The MRC is written in a [[C (computer language)\|C-language]] code, which can be edited and [[compiler\|compiled]] by board makers. It provides a space to develop advanced features, and the ability to tune memory. We try to look into [Intel's] Memory Reference Code to try to understand its behaviour ... Sometimes, there are some remarks inside the source code, while on other occasions, we just try to change the arguments to see what effect it has. If we take the time to understand the MRC then we can get more out of it. If we put in more effort than our competitors, we can find more information."

	: "The MRC usually only provides support for industry-standard memory configurations. For instance, under a 1,066MHz [[Front Side Bus\|FSB]], the only choices regarding memory speed in the MRC are [[DDR2 SDRAM\|DDR2]]-667 and DDR2-800. We have to provide additional choices. For people who want higher memory frequency, we used the setting of 800MHz FSB:DDR2-800 in MRC, but overclocked it to work with a 1,066MHz FSB, so we could implement support for DDR2-1066."		: "The MRC usually only provides support for industry-standard memory configurations. For instance, under a 1,066MHz [[Front Side Bus\|FSB]], the only choices regarding memory speed in the MRC are [[DDR2 SDRAM\|DDR2]]-667 and DDR2-800. We have to provide additional choices. For people who want higher memory frequency, we used the setting of 800MHz FSB:DDR2-800 in MRC, but overclocked it to work with a 1,066MHz FSB, so we could implement support for DDR2-1066."

Tom.Reding: Ref cleanup; WP:GenFixes on; using AWB

2017-10-14T19:31:44Z

Ref cleanup; WP:GenFixes on; using AWB

← Previous revision		Revision as of 19:31, 14 October 2017
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	== Overview ==		== Overview ==

	[[Intel]] has defined the Memory Reference Code (MRC) as follows:<ref>{{cite web\|~~last~~=David Hilber, Jr.\|title=Considerations for Designing an Embedded Intel Architecture System with System Memory Down ®\|url=http://www.intel.com/content/dam/www/public/us/en/documents/white-papers/ia-system-memory-down-paper.pdf\|publisher=[[Intel]]\|accessdate=14 April 2015\|date=August 2009}}</ref>		[[Intel]] has defined the Memory Reference Code (MRC) as follows:<ref>{{cite web\|author=David Hilber Jr.\|title=Considerations for Designing an Embedded Intel Architecture System with System Memory Down ®\|url=http://www.intel.com/content/dam/www/public/us/en/documents/white-papers/ia-system-memory-down-paper.pdf\|publisher=[[Intel]]\|accessdate=14 April 2015\|date=August 2009}}</ref>

	: "The MRC is responsible for initializing the memory as part of the [[Power-on self-test\|POST]] process at power-on. Intel provides support in the MRC for all fully validated memory configurations. For non-validated configurations, a system designer should work with their [[BIOS]] vendor to produce a working MRC solution ... The MRC in the system BIOS needs to know the specification of the attached system memory. Most of this info should be contained in the onboard [[Serial presence detect\|SPD]]. With this in mind care needs to be taken when programming the appropriate values into the SPD [the part of a [[memory module]] that contains its operating requirements and specification]. A system designer should work with their memory and BIOS vendors to implement a suitable SPD programming."		: "The MRC is responsible for initializing the memory as part of the [[Power-on self-test\|POST]] process at power-on. Intel provides support in the MRC for all fully validated memory configurations. For non-validated configurations, a system designer should work with their [[BIOS]] vendor to produce a working MRC solution ... The MRC in the system BIOS needs to know the specification of the attached system memory. Most of this info should be contained in the onboard [[Serial presence detect\|SPD]]. With this in mind care needs to be taken when programming the appropriate values into the SPD [the part of a [[memory module]] that contains its operating requirements and specification]. A system designer should work with their memory and BIOS vendors to implement a suitable SPD programming."

← Previous revision		Revision as of 01:54, 7 March 2021
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	[[Intel]] has defined the Memory Reference Code (MRC) as follows:<ref>{{cite web\|author=David Hilber Jr.\|title=Considerations for Designing an Embedded Intel Architecture System with System Memory Down ®\|url=http://www.intel.com/content/dam/www/public/us/en/documents/white-papers/ia-system-memory-down-paper.pdf\|publisher=[[Intel]]\|accessdate=14 April 2015\|date=August 2009}}</ref>		[[Intel]] has defined the Memory Reference Code (MRC) as follows:<ref>{{cite web\|author=David Hilber Jr.\|title=Considerations for Designing an Embedded Intel Architecture System with System Memory Down ®\|url=http://www.intel.com/content/dam/www/public/us/en/documents/white-papers/ia-system-memory-down-paper.pdf\|publisher=[[Intel]]\|accessdate=14 April 2015\|date=August 2009}}</ref>

	~~: "~~The MRC is responsible for initializing the memory as part of the [[Power-on self-test\|POST]] process at power-on. Intel provides support in the MRC for all fully validated memory configurations. For non-validated configurations, a system designer should work with their [[BIOS]] vendor to produce a working MRC solution ... The MRC in the system BIOS needs to know the specification of the attached system memory. Most of this info should be contained in the onboard [[Serial presence detect\|SPD]]. With this in mind care needs to be taken when programming the appropriate values into the SPD [the part of a [[memory module]] that contains its operating requirements and specification]. A system designer should work with their memory and BIOS vendors to implement a suitable SPD programming."		<blockquote>The MRC is responsible for initializing the memory as part of the [[Power-on self-test\|POST]] process at power-on. Intel provides support in the MRC for all fully validated memory configurations. For non-validated configurations, a system designer should work with their [[BIOS]] vendor to produce a working MRC solution ... The MRC in the system BIOS needs to know the specification of the attached system memory. Most of this info should be contained in the onboard [[Serial presence detect\|SPD]]. With this in mind care needs to be taken when programming the appropriate values into the SPD [the part of a [[memory module]] that contains its operating requirements and specification]. A system designer should work with their memory and BIOS vendors to implement a suitable SPD programming.</blockquote>

	As such, the MRC is a part of the BIOS (or [[firmware]]) of an [[Intel]] [[motherboard]]. George Chen, a [[research and development]] (R&D) director at [[ASUS]], described it in 2007 as follows:<ref name="Life and Times" />		As such, the MRC is a part of the BIOS (or [[firmware]]) of an [[Intel]] [[motherboard]]. George Chen, a [[research and development]] (R&D) director at [[ASUS]], described it in 2007 as follows:<ref name="Life and Times" />
	~~: "~~The MRC is part of reference BIOS code, which relates to memory initialization in the BIOS. It includes information about memory settings, frequency, timing, driving and detailed operations of the memory controller. The MRC is written in a [[C (computer language)\|C-language]] code, which can be edited and [[compiler\|compiled]] by board makers. It provides a space to develop advanced features, and the ability to tune memory. We try to look into [Intel's] Memory Reference Code to try to understand its behaviour ... Sometimes, there are some remarks inside the source code, while on other occasions, we just try to change the arguments to see what effect it has. If we take the time to understand the MRC then we can get more out of it. If we put in more effort than our competitors, we can find more information."		<blockquote>The MRC is part of reference BIOS code, which relates to memory initialization in the BIOS. It includes information about memory settings, frequency, timing, driving and detailed operations of the memory controller. The MRC is written in a [[C (computer language)\|C-language]] code, which can be edited and [[compiler\|compiled]] by board makers. It provides a space to develop advanced features, and the ability to tune memory. We try to look into [Intel's] Memory Reference Code to try to understand its behaviour ... Sometimes, there are some remarks inside the source code, while on other occasions, we just try to change the arguments to see what effect it has. If we take the time to understand the MRC then we can get more out of it. If we put in more effort than our competitors, we can find more information.</blockquote>

	~~: "~~The MRC usually only provides support for industry-standard memory configurations. For instance, under a 1,066MHz [[Front Side Bus\|FSB]], the only choices regarding memory speed in the MRC are [[DDR2 SDRAM\|DDR2]]-667 and DDR2-800. We have to provide additional choices. For people who want higher memory frequency, we used the setting of 800MHz FSB:DDR2-800 in MRC, but overclocked it to work with a 1,066MHz FSB, so we could implement support for DDR2-1066."		<blockquote>The MRC usually only provides support for industry-standard memory configurations. For instance, under a 1,066MHz [[Front Side Bus\|FSB]], the only choices regarding memory speed in the MRC are [[DDR2 SDRAM\|DDR2]]-667 and DDR2-800. We have to provide additional choices. For people who want higher memory frequency, we used the setting of 800MHz FSB:DDR2-800 in MRC, but overclocked it to work with a 1,066MHz FSB, so we could implement support for DDR2-1066.</blockquote>

	The article author describes the MRC as "One of the most important aspects of the BIOS for an Intel board" and the reason why "one [board might be] a brilliant [[overclocking\|overclocker]] and another [is] as stable as a plate of jelly on a bouncy castle"; adding that "When you're overclocking, you're literally running clocks faster than normal. Working out the effect of this on the various different components on the board is a task that a good BIOS must be able to handle." <ref name="Life and Times" />		The article author describes the MRC as "One of the most important aspects of the BIOS for an Intel board" and the reason why "one [board might be] a brilliant [[overclocking\|overclocker]] and another [is] as stable as a plate of jelly on a bouncy castle"; adding that "When you're overclocking, you're literally running clocks faster than normal. Working out the effect of this on the various different components on the board is a task that a good BIOS must be able to handle." <ref name="Life and Times" />

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	The article author describes the MRC as "One of the most important aspects of the BIOS for an Intel board" and the reason why "one [board might be] a brilliant [[overclocking\|overclocker]] and another [is] as stable as a plate of jelly on a bouncy castle"; adding that "When you're overclocking, you're literally running clocks faster than normal. Working out the effect of this on the various different components on the board is a task that a good BIOS must be able to handle." <ref name="Life and Times" />		The article author describes the MRC as "One of the most important aspects of the BIOS for an Intel board" and the reason why "one [board might be] a brilliant [[overclocking\|overclocker]] and another [is] as stable as a plate of jelly on a bouncy castle"; adding that "When you're overclocking, you're literally running clocks faster than normal. Working out the effect of this on the various different components on the board is a task that a good BIOS must be able to handle." <ref name="Life and Times" />

	== ~~Seel~~ also ==		== See also ==
	* [[AGESA]]		* [[AGESA]]