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citations, all processors are dead except maybe JOP |
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A '''Java processor''' is the implementation of the [[Java virtual machine]] (JVM) in hardware. In other words, the [[Java bytecode]] that makes up the instruction set of the abstract machine becomes the instruction set of a concrete machine. These |
A '''Java processor''' is the implementation of the [[Java virtual machine]] (JVM) in hardware. In other words, the [[Java bytecode]] that makes up the instruction set of the abstract machine becomes the instruction set of a concrete machine. These were the most popular form of a [[high-level language computer architecture]], and were "an attractive choice for building embedded and real-time systems that are programmed in Java".<ref name=Binder>{{cite journal |last1=Binder |first1=Walter |last2=Schoeberl |first2=Martin |last3=Moret |first3=Philippe |last4=Villazon |first4=Alex |title=Cross-Profiling for Embedded Java Processors |journal=2008 Fifth International Conference on Quantitative Evaluation of Systems |date=September 2008 |pages=287–296 |doi=10.1109/QEST.2008.39}}</ref> However, as of 2017, embedded Java is "pretty much dead" and no realtime Java chip vendors exist.<ref>{{cite web |title=Systronix Home |url=http://www.systronix.com/ |website=www.systronix.com |access-date=6 June 2022 |archive-url=https://web.archive.org/web/20170818062055/http://www.systronix.com/ |archive-date=18 August 2017}}</ref> |
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== Implementations == |
== Implementations == |
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There are |
There are several research Java processors tested on FPGA, including: |
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*[[picoJava]] was the first attempt by [[Sun Microsystems]] |
*[[picoJava]] was the first attempt to build a Java processor, by [[Sun Microsystems]]. Its successor picoJava-II was freely available under the [[Sun Community Source License]],<ref name=Binder/> and is still available from some archives. |
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⚫ | *{{Proper name|jHISC}}<ref>{{Cite journal| doi = 10.1016/j.micpro.2005.12.007| title = A Java processor with hardware-support object-oriented instructions| year = 2006| last1 = Yiyu | first1 = T.| last2 = Wanyiu | first2 = L.| last3 = Chihang | first3 = Y.| last4 = Li | first4 = R.| last5 = Fong | first5 = A.| journal = Microprocessors and Microsystems| volume = 30| issue = 8| pages = 469 }}</ref> provides hardware support for object-oriented functions |
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⚫ | *[[Java Optimized Processor]]<ref>{{Cite journal| first1 = M.| title = A Java processor architecture for embedded real-time systems| last1 = Schoeberl| journal = Journal of Systems Architecture| volume = 54| issue = 1–2| pages = 265–286| year = 2008 | doi = 10.1016/j.sysarc.2007.06.001| citeseerx = 10.1.1.68.8757}}</ref> for [[FPGA]]s. A PhD thesis is [https://web.archive.org/web/20120204093123/http://www.jopdesign.com/thesis/index.jsp available], and it has been used in several commercial applications.<ref name=Binder/> In 2019 it was extended to be energy aware (EAJOP).<ref>{{cite journal |last1=Tewary |first1=Manish |last2=Malik |first2=Avinash |last3=Salcic |first3=Zoran |last4=Biglari-Abhari |first4=Morteza |title=An Energy Efficient Embedded Processor for Hard Real-Time Java Applications |journal=Architecture of Computing Systems – ARCS 2019 |date=2019 |volume=11479 |pages=281–292 |doi=10.1007/978-3-030-18656-2_21}}</ref> |
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Some commercial implementations included: |
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* The aJile processor was the most successful [[ASIC]] Java processor.<ref name=Binder/> |
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*Cjip from Imsys Technologies. Available on boards and with wireless radios from AVIDwireless<ref>"Imsys hedges bets on Java: [[microcode#Writable_control_stores | rewritable-microcode]] chip has instruction sets for Java, Forth, C/C++"] |
*Cjip from Imsys Technologies. Available on boards and with wireless radios from AVIDwireless<ref>"Imsys hedges bets on Java: [[microcode#Writable_control_stores | rewritable-microcode]] chip has instruction sets for Java, Forth, C/C++"] |
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by Tom R. Halfhill |
by Tom R. Halfhill |
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[http://www.imsystech.com/press_room/press_archive/press_micro_p_report.pdf] {{Webarchive|url=https://web.archive.org/web/20081119232421/http://www.imsystech.com/press_room/press_archive/press_micro_p_report.pdf |date=2008-11-19 }}</ref> |
[http://www.imsystech.com/press_room/press_archive/press_micro_p_report.pdf] {{Webarchive|url=https://web.archive.org/web/20081119232421/http://www.imsystech.com/press_room/press_archive/press_micro_p_report.pdf |date=2008-11-19 }}</ref> |
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*[[ARM9E|ARM926EJ-S]] is an ARM processor able to run Java bytecode, this technology being named ''[[Jazelle]]'' |
*[[ARM9E|ARM926EJ-S]] is an ARM processor able to run Java bytecode, this technology being named ''[[Jazelle]]'' |
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⚫ | *[[Java Optimized Processor]]<ref>{{Cite journal| first1 = M.| title = A Java processor architecture for embedded real-time systems| last1 = Schoeberl| journal = Journal of Systems Architecture| volume = 54| issue = 1–2| pages = 265–286| year = 2008 | doi = 10.1016/j.sysarc.2007.06.001| citeseerx = 10.1.1.68.8757}}</ref> for [[FPGA]]s. A PhD thesis is [https://web.archive.org/web/20120204093123/http://www.jopdesign.com/thesis/index.jsp available] |
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⚫ | *{{Proper name|jHISC}}<ref>{{Cite journal| doi = 10.1016/j.micpro.2005.12.007| title = A Java processor with hardware-support object-oriented instructions| year = 2006| last1 = Yiyu | first1 = T.| last2 = Wanyiu | first2 = L.| last3 = Chihang | first3 = Y.| last4 = Li | first4 = R.| last5 = Fong | first5 = A.| journal = Microprocessors and Microsystems| volume = 30| issue = 8| pages = 469 }}</ref> provides hardware support for object-oriented functions |
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==References== |
==References== |
Revision as of 20:16, 6 June 2022
A Java processor is the implementation of the Java virtual machine (JVM) in hardware. In other words, the Java bytecode that makes up the instruction set of the abstract machine becomes the instruction set of a concrete machine. These were the most popular form of a high-level language computer architecture, and were "an attractive choice for building embedded and real-time systems that are programmed in Java".[1] However, as of 2017, embedded Java is "pretty much dead" and no realtime Java chip vendors exist.[2]
Implementations
There are several research Java processors tested on FPGA, including:
- picoJava was the first attempt to build a Java processor, by Sun Microsystems. Its successor picoJava-II was freely available under the Sun Community Source License,[1] and is still available from some archives.
- jHISC[3] provides hardware support for object-oriented functions
- Java Optimized Processor[4] for FPGAs. A PhD thesis is available, and it has been used in several commercial applications.[1] In 2019 it was extended to be energy aware (EAJOP).[5]
Some commercial implementations included:
- The aJile processor was the most successful ASIC Java processor.[1]
- Cjip from Imsys Technologies. Available on boards and with wireless radios from AVIDwireless[6]
- ARM926EJ-S is an ARM processor able to run Java bytecode, this technology being named Jazelle
References
- ^ a b c d Binder, Walter; Schoeberl, Martin; Moret, Philippe; Villazon, Alex (September 2008). "Cross-Profiling for Embedded Java Processors". 2008 Fifth International Conference on Quantitative Evaluation of Systems: 287–296. doi:10.1109/QEST.2008.39.
- ^ "Systronix Home". www.systronix.com. Archived from the original on 18 August 2017. Retrieved 6 June 2022.
- ^ Yiyu, T.; Wanyiu, L.; Chihang, Y.; Li, R.; Fong, A. (2006). "A Java processor with hardware-support object-oriented instructions". Microprocessors and Microsystems. 30 (8): 469. doi:10.1016/j.micpro.2005.12.007.
- ^ Schoeberl, M. (2008). "A Java processor architecture for embedded real-time systems". Journal of Systems Architecture. 54 (1–2): 265–286. CiteSeerX 10.1.1.68.8757. doi:10.1016/j.sysarc.2007.06.001.
- ^ Tewary, Manish; Malik, Avinash; Salcic, Zoran; Biglari-Abhari, Morteza (2019). "An Energy Efficient Embedded Processor for Hard Real-Time Java Applications". Architecture of Computing Systems – ARCS 2019. 11479: 281–292. doi:10.1007/978-3-030-18656-2_21.
- ^ "Imsys hedges bets on Java: rewritable-microcode chip has instruction sets for Java, Forth, C/C++"] by Tom R. Halfhill [1] Archived 2008-11-19 at the Wayback Machine