Athlon 64 X2: Difference between revisions
Appearance
Content deleted Content added
mNo edit summary |
|||
Line 10: | Line 10: | ||
===Manchester/Toledo (90 nm SOI)=== |
===Manchester/Toledo (90 nm SOI)=== |
||
Dual-core CPU |
Dual-core CPU |
||
*'''Manchester''' = |
*'''Manchester''' = 2×512 kB L2-Cache, '''Toledo''' = 2×1024 kB L2-Cache |
||
* CPU-Stepping: '''E4''' (Manchester) and '''E6''' (Toledo) |
* CPU-Stepping: '''E4''' (Manchester) and '''E6''' (Toledo) |
||
* L1-Cache: 64 + 64 kB (Data + Instructions), per core |
* L1-Cache: 64 + 64 kB (Data + Instructions), per core |
||
Line 20: | Line 20: | ||
* First Release: April 21, [[2005]] |
* First Release: April 21, [[2005]] |
||
* Clockrate:: 2200 - 2400 MHz |
* Clockrate:: 2200 - 2400 MHz |
||
** 4200+: 2200 MHz, |
** 4200+: 2200 MHz, 2×512 kB L2-Cache (Manchester) |
||
** 4400+: 2200 MHz, |
** 4400+: 2200 MHz, 2×1024 kB L2-Cache (Toledo) |
||
** 4600+: 2400 MHz, |
** 4600+: 2400 MHz, 2×512 kB L2-Cache (Manchester) |
||
** 4800+: 2400 MHz, |
** 4800+: 2400 MHz, 2×1024 kB L2-Cache (Toledo) |
||
==See also== |
==See also== |
Revision as of 17:54, 28 June 2005
The Athlon 64 X2 is the first dual-core desktop CPU manufactured by AMD. It is essentially a processor consisting of two Athlon 64 cores joined together on one die. The cores share one dual-channel memory controller, are based on the E-stepping model of Athlon 64, and depending on the model have either 512 or 1024 kB of L2-Cache per core. The X2 sets the Hyper-threading flag and is also capable of decoding SSE3 instructions, so it can run and benefit from software optimizations that were previously mainly designed for Intel processors only.
AMD officially started shipping the Athlon 64 X2 at Computex, on 1st June 2005.
It has been rumored that AMD plans to ship Quad Core chips in Q1 2006. [1]
CPU Cores
Manchester/Toledo (90 nm SOI)
Dual-core CPU
- Manchester = 2×512 kB L2-Cache, Toledo = 2×1024 kB L2-Cache
- CPU-Stepping: E4 (Manchester) and E6 (Toledo)
- L1-Cache: 64 + 64 kB (Data + Instructions), per core
- L2-Cache: 512/1024 kB, fullspeed, per core
- MMX, Extended 3DNow!, SSE, SSE2, SSE3, AMD64, Cool'n'Quiet, NX Bit
- Socket 939, HyperTransport (1000 MHz, HT1000)
- VCore: 1.35 V
- Power Consumption (TDP): 110 Watt max
- First Release: April 21, 2005
- Clockrate:: 2200 - 2400 MHz
- 4200+: 2200 MHz, 2×512 kB L2-Cache (Manchester)
- 4400+: 2200 MHz, 2×1024 kB L2-Cache (Toledo)
- 4600+: 2400 MHz, 2×512 kB L2-Cache (Manchester)
- 4800+: 2400 MHz, 2×1024 kB L2-Cache (Toledo)