Application-specific instruction set processor

An application-specific instruction-set processor (ASIP) is a component used in system-on-a-chip design. The instruction set of an ASIP is tailored to benefit a specific application. This specialization of the core provides a tradeoff between the flexibility of a general purpose CPU and the performance of an ASIC.

Interest in synthesis of Application Specific Instruction Processor or ASIP has increased considerably and a number of methodologies have been proposed in the recent period. The detaled survey paper is produced by Manoj Kumar Jain et al. This paper attempts to survey the state of the art in this area and identifies some issues which need to be addressed. We have identified the five key steps in ASIP design as application analysis, architectural design space exploration, instruction set generation, code synthesis and hardware synthesis. A broad classification of the approaches reported in the literature is done. The paper notes the need to broaden the architectural space being explored and to tightly couple the various subtasks in ASIP synthesis. Manoj Kumar Jain et al. have surveyed the art of ASIP Design Space Exploration.

Some ASIPs have a configurable instruction set. Usually, these cores are divided into two parts: static logic which defines a minimum ISA (instruction-set architecture) and configurable logic which can be used to design new instructions. The configurable logic can be programmed either in the field in a similar fashion to an FPGA or during the chip synthesis.

Literature

• Manoj Kumar Jain, M. Balakrishnan, and Anshul Kumar (2001). ASIP Design Methodologies: Survey and Issues. India: IEEE VLSI 2001. ISSN 1063-9667.{{cite book}}: CS1 maint: multiple names: authors list (link)
• Manoj Kumar Jain and Deepak Gour (20011). ASIP Design Space Exploration: Survey and Issues. USA: IJCSIS. ISSN 1947-5500. {{cite book}}: Check date values in: |year= (help)CS1 maint: year (link)
• Dake Liu (2008). Embedded DSP Processor Design Application Specific Instruction-set Processors. MA: Elsevier Mogan Kaufmann. ISBN 978-0-12-374123-3.
• Oliver Schliebusch, Heinrich Meyr, Rainer Leupers (2007). Optimized ASIP Synthesis from Architecture Description Language Models. Dordrecht: Springer. ISBN 978-1-4020-5685-7.{{cite book}}: CS1 maint: multiple names: authors list (link)
• Paolo Ienne, Rainer Leupers (eds.) (2006). Customizable Embedded Processors. San Mateo, CA: Morgan Kaufmann. ISBN 978-0-12-369526-0. {{cite book}}: |author= has generic name (help)
• Matthias Gries, Kurt Keutzer (eds.) (2005). Building ASIPs: The Mescal Methodology. New York: Springer. ISBN 978-0-387-26057-0. {{cite book}}: |author= has generic name (help)

External links

• TTA-Based Codesign Environment (TCE), an open source (MIT licensed) toolset for design of application specific TTA processors.