Macintosh 128K/512K technical details
This article is a work in progress. Its purpose is to document the hardware details, memory map, etc of the ORIGINAL Mac 128K. There is probably no purpose in detailing all of the technical details of later Mac models, but the 128K Mac is interesting because it was the first Mac, and was relatively simple, and can be readily understood. In addition, hardware details of this model are in the public domain, having been fully documented in the original Inside Macintosh series.
Processor
Motorola MC68000 CPU. Clock speed: 7.8336 MHz
Memory
- 128K RAM
- 64K ROM
I/O
- Synertek SY6522 Versatile Interface Adapter (VIA)
- Zilog Z8530 Serial Communications Controller (SCC)
- Custom Chip - "Integrated Woz Machine" or IWM for disk control.
- Video Display
- Sound Generation
General Architecture
The Mac uses Memory mapped I/O throughout. The 68000 chip can address 16M of memory, and this is divided into four equal 4M parts or zones:
- $000000 - $3FFFFF = RAM, screen display, sound generator, disk speed controller
- $400000 - $7FFFFF = ROM
- $800000 - $BFFFFF = SCC
- $C00000 - $FFFFFF = VIA and IWM
At startup, ROM and RAM are remapped temporarily so that an image of ROM exists from $000000, and RAM is moved to $600000
Video architecture
Video accesses are interleaved with the CPU so that the video screen buffer is a normal part of the RAM. The pixel clock rate is 15.6672 MHz. The standard display screen is 512 pixels horizontally and 342 pixels vertically. Each horizontal scan line, scanned from left to right, takes 44.93 µS, which includes 512 pixels of data and 192 "pixels" of horizontal blanking interval during which the scan returns to the left hand side of the screen (flyback). The entire screen is refreshed in 15.37 mS, plus a further 28 scan lines of vertical blanking. The total screen refresh rate is thus 60.15 Hz.
A full screen image is composed of 21,888 bytes of RAM, organised as a 512 x 342 pixel image, with 1 bit per pixel. A black pixel is indicated by a '1', white by '0'. A single scan line consists of 32 words, each of 16 bits. The high order bits are to the left of the low order bits when displayed.
The screen buffer is an area of RAM starting at address $1A700, stored in the global low memory variable ScrnBase. There is an alternate screen buffer available at address $12700. Which buffer is read by the hardware is controlled by one the VIA ports. Using two buffers is one technique for producing smooth flicker-free animation.
Sound and disk speed control
The sound system on the original Macintosh uses an area of RAM as a sound buffer, a digital-to-analog converter, and a programmable attentuator. The various parts are controlled by ports on the VIA. The sound circuitry is connected to the video display such that the sound buffer is scanned at a fixed rate of 370 words per video frame, giving a maximum sampling rate of 22.256 kHz. The sound driver includes routines for setting up phase-shifted waveform patterns in the sound buffer to create sounds with different frequencies and timbres.
The sound buffer is interleaved with the disk speed controller buffer, which is used to control the rotational speed of the floppy disk drive. The drive uses a constant linear velocity and therefore a variable angular velocity. The speed control circuitry is very similar to the sound circuitry, consisting of another D-to-A convertor.
The sound buffer consists of 370 words of RAM at address $1FD00, given by the variable SoundBase. An alternate buffer is available at $1A100.
Other I/0
Two RS422 serial ports are supported by the Zilog Z8530 SCC chip.
The mouse "port" is connected to lines on the SCC and the VIA chips.
The keyboard contains its own Intel 8021 processor which scans the keys and buffers them. The keyboard connector port is connected to lines on the VIA.
Internal and external disks are controlled by the IWM. The disk speed is controlled by the D-to-A conversion process given above. The Mac disk ports and operation are virtually identical to that of the Apple II and Apple III computers.
A combined real-time clock and parameter RAM chip is also available, accessed via a simple 3-line serial port on the VIA.
Memory Map
- RAM ($000000 - $01FFFF) is divided up into a series of different functional areas:
- System globals ($000000 - $000AFF)
- System heap ($000B00). SysZone points to start, ApplZone points to end + 1
- Application heap (ApplZone; grows upwards. HeapEnd points to its and; ApplLimit sets maximum)
- Stack. Grows downwards from CurStackBase; SP = A7 points to top of stack.
- QuickDraw globals. (206 bytes) A5 points to boundary between QD globals and App globals.
- Application globals
- Application parameters (32 bytes)
- Jump table
- Alternate screen buffer, 21,888 bytes (BufPtr)
- 9344 bytes of undocumented space
- 740 bytes alternate sound buffer
- 796 bytes undocumented
- Screen buffer, 21,888 bytes (ScrnBase = $01A700)
- System Error handler, 128 bytes
- Main sound buffer, 740 bytes
- 28 bytes undocumented, MemTop points to the end of RAM, +1
- ROM ($40000 - $40FFFF)
- sccRBase - SCC read operations - $9FFFF8
- sccWBase - SCC write operations - $BFFFF9
- IWM (dBase) $DFE1FF
- VIA (vBase) $EFE1FE
- aVBufB - register B base - $EFE1FE
- aVBufA - register A base - $EFFFFE
- aVIFR - interrupt flag register - $EFFBFE
- aVIER - interrupt enable register - $EFFDFE
Note that the RAM map is organised so that the system globals, system and application heaps grow upwards from low memory, everything else grows downwards from MemTop, towards high memory. On the 512K Macintosh, the "extra" RAM thus appears as a wider gap between the application heap and the stack, where it is available for application use.