Talk:PDP-8

Power dissipation

In doing some research for improving the CPU power consumption article (which is currently quite poor), I've come across several figures for the power consumption of various PDP-8 models. Anyone think this information would be interesting to include here, or an unneccessary aside? -- uberpenguin 16:51, 20 October 2005 (UTC)[reply]

It would probably be most interesting when set in the context of "MIPS per Watt" or some such. PDP-8s drew typical amounts of power for their time (seems to me that the PDP-8/E power supply was rated at about 20 or 25 amps of +5 plus a few other voltages to operate the serial lines and core memory) but you didn't get very much computation for your 125 watts, especially when compared to modern microprocessor chips!

Atlant 17:04, 31 October 2005 (UTC)[reply]

Bad memory?

Sounds like a case of bad memory to me. But he did say "if i remember correctly" (or something like that). I guess he didn't... RTC 06:55 Nov 5, 2002 (UTC)

I have a problem with this article. There's a lot of technical language that is not explained. What is a "word of memory", for instance?

I've now defined what a word of memory is, and will go back and re-read the entire article as time permits. In the best Wikipedia fashion, everyone else, of course, is also welcome to pitch in!

Atlant 13:14, 6 Dec 2004 (UTC)

Another comment (I made the first observation, above). I recently took a course in Technical Communication, and would like to try and make this article more accessible to readers without a technical background. I'm going to detail the whole process in this discussion area, so editors know what I'm doing and why I'm doing it.

My intent is not to delete any information already present, but to break it down into chunks for more specific audiences. A high school student doing a report about the history of computing should find this article as useful as an antique computing enthusiast looking for an example of assembly code.

--JonBuck

JonBuck, I think that the Wikipedia tradition is that you don't need to convince any of us about why you're doing it as long as you're doing it right. None of us "own" the PDP-8 page, and we'll all appreciate attempts to improve it. (See Wikipedia:Be bold in updating pages.) And if you manage to put some technical fact askew, we'll all manage to get it fixed.

By the way, you can "sign" your name to talk pages by typing three tildes in succession (but with no intervening spaces): ~ ~ ~. Four tildes will sign your name and the current timestamp.

Atlant 13:55, 7 Dec 2004 (UTC)

Okay, I've re-read the article (and expanded on a few things), but I don't see where it needs a lot of jargon explained. Remember, the idea here is that we don't need to explain everything "in place" as long as everything is suitably hyper-linked to an explanation. For example, we don't need to explain core memory, just ensure that it's hyperlinked to an article that does explain it.

Obviously, you're free to disagree with me, but please read and edit the article with that in mind.

Atlant 18:00, 7 Dec 2004 (UTC)

As an old-timer, I'd like to point out that we always referred to a byte as half of a word, regardless of the word size. Thus, within the context of the PDP-8, maximum memory would be 32k words or 64k 6-bit bytes. Would anyone object to a minor change indicating 8-bit bytes for the 48k figure in the article? Grumpyoldgeek 23:05, 11 November 2005 (UTC)[reply]

Example code looks wrong to me

It's been a while (31 years, to be precise, so I'd like confirmation of this before I change it).

The code looks wrong to me. Specifically, the TAD (DATA-1).

The TAD instruction grabs the data AT the location specified. To get the address of the data being referenced, you'd need to grab data that references it directly. Doing a TAD (DATA-1) would appear, to me, to be getting the INSTRUCTION that happens to be just before the location tagged with "DATA" in the assembler code.

My proposed change:

HELLO,  CLA CLL         / Clear the AC and the Link bit
          TAD DADDR

... ...

  DADDR, .
  DATA,  "H               / A well-known message
         "e               /

I'd like to know people's thoughts on this, but I'm pretty sure I'm right.
PKtm 15:24, 30 September 2005 (UTC)[reply]

I think you're forgetting one or two things:

1. The "(SYMB)" grammar in PAL-III builds an on-page "magic literal" that contains the value of the symbol contained in the parentheses, and

2. Indirect accesses from locations 10 through 17 pre-increment the memory location before using it as an address. So you want to preset it one location "earlier" than the data to be indirectly accessed.

The "TAD (STR-1)" style takes advantage of both of these things, building a magic literal that contains a datum (an address, really) that points one word before the "Hello, world!" string. But as in Perl, TMTOWTDI; your way using a cell containg the crrent location counter at the head of the string works as well.

Atlant 16:32, 30 September 2005 (UTC)[reply]

OK, fair enough, and thanks for the explanation. I remembered the autoincrement (that's a feature of the hardware), but not the "magic literal" feature of the assembler itself (not sure that this feature was even in PAL-D, which is what I remember using on my very minimalist 4K PDP-8/I)

It just seems to me that here on Wikipedia, dealing with the basics, we should avoid showing what is really just "syntactic sugar" (e.g., building a magic literal), because people who don't know (or, ahem, remember) that feature of the assembler itself (just software, that is) could get confused.

BTW, I'm a Perl coder now too. :)

PKtm 17:50, 1 October 2005 (UTC)[reply]

OK, and another thing... Now that I look at it more carefully, the point of the section on subroutines is lost, because the first "example program" already uses a subroutine. The section on subroutines, contrary to what it says, doesn't show the "hello world" example "rewritten to use a subroutine," but rather just uses a different looping construct (null-terminating the data, rather than using a counter).

PKtm 20:29, 2 October 2005 (UTC)[reply]

Okay, I fixed up the example to make it a lot simpler (and avoid any subroutine) although I did use a magic literal. Still, the example does claim to be written in PAL-III and not PAL-D. :-) But we could certainly go back to the cute "label, ." trick to avoid that if you like.

Atlant 17:18, 3 October 2005 (UTC)[reply]

Looks better, simpler, and has good progression. I also just changed it to all-caps in the first example, for consistency between the two examples, and also because we didn't (typically) even have lower-case way-back-then.

Personally, I think it's less confusing to avoid the magic literal, but I'll let you decide.

PKtm 04:22, 4 October 2005 (UTC)[reply]

Thanks for the up-casing. I prefer that for PAL but didn't want to change the original text (to that degree :-). With regard to the magic literal, I don't feel strongly about it either. We could let inertia rule or you could change back to your "label, ." structure and I certainly won't revert you. Or we could just explicitly declare a data cell and fill it with the value, doing the the same thing as either of the other two approaches. TMTOWTDI. :-)

Atlant 12:58, 4 October 2005 (UTC)[reply]

Clock frequency

Does anybody happen to know what a typical clock period for a PDP-8 as generated by one of the RC oscillator flip chips (like this one) was? I can't find any docs on this specific. -- uberpenguin 04:30, 15 October 2005 (UTC)[reply]

PDP-8s didn't have a "clock" in the exact sense that you think of them today. They had a "timing generator" that was crystal-controlled (at least on some models; it may have been a delay-line oscillator on the earlier models) but the end result of the timing generator was a series of "time states" and "time pulses" that varied depending on the exact machine operation that was to be performed. The speed of the cycle was intimately associated with the speed of the core memory system that was used in any particular generation of PDP-8.

For the PDP-8/E/F/M (the models I'm most familiar with), the timing generator (the M8330 module [1]) could generate two different cycles: a 1.2 us fast cycle and a 1.5 us slow cycle. The fast cycle was used for ordinary core memory accesses (where you were doing a read/restore or clear/write operation). The 1.5 us slow cycle was used when you were doing a read-modify-write core cycle (as you do with an ISZ instruction, when you access memory locations 10 through 17 as an indirect address, or when you're accessing the word-count or bus-address words for three-cycle data-break).

If we assume purely fast cycles, one could therefore loosely speak of a PDP-8 having a clock rate of 833 kHz, but we never spoke of them in those terms.

Atlant 01:10, 16 October 2005 (UTC)[reply]

Hmm.. So is it safe to say that the PDP-8s used, at least in part, asynchronous logic? Or did all the TTL just operate on whatever time cycle the core memory required for the operation? -- uberpenguin 01:29, 16 October 2005 (UTC)[reply]

The latter. Essentially, the timing generator executed a strict state machine that went through the various phases and time states as required by the instruction currently under execution (or the state of the "Data Break" I/O logic which time-shared the core memory with the CPU).

This is pretty similar to most modern microprocessors but much different than (say) the PDP-11, where the processor timing often was truly asynchronous, depending on external signals from the Unibus to advance through its processing.

Atlant 16:06, 20 October 2005 (UTC)[reply]

The PDP-8/I and 8/L had true asynchronous logic. There is no crystal oscillator to be found. Timing pulses and delays were achieved with tapped hardware delay lines such as the M360 module.

The PDP-8/E and 8/F used the above mentioned timing generator with a master crystal oscillator and the logic was syncronous. I can't speak authoritatively, but I believe the 8/s was async as well. Grumpyoldgeek 01:00, 12 November 2005 (UTC)[reply]

Still operating?

The second para of the Data General history section says that many PDP-8s still operate today. Is this still true? If so, it would be worthy of a mention in this article. If not, the DG article needs to change.-gadfium 21:12, 26 December 2005 (UTC)[reply]

Yes, there are indeed still PDP-8's in operation. There's one site where you can even operate a live one over the web via a Java interface. --72.35.146.211 15:54, 6 July 2006 (UTC)[reply]

And you can download several different PDP-8 compiler programs. They taught PDP-8 in a certain Australian University in 2005. Its still out there *spooky noise* glasnt ^<3 05:57, 21 July 2006 (UTC)[reply]