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5 June 2025

diffhist MOS Technology 16:17 +67 50.185.209.33 talk (→Products)

3 June 2025

diffhist MOS Technology 6502 18:34 +7 Kvng talk contribs (review: WP:NPOV)

2 June 2025

diffhist CSG 65CE02 14:12 −401 RastaKins talk contribs (→New features: OOPs.. hit publish accidentally. Nutshell: PH and PL are by far the most common stack instructions and their performance is not affected by stack pointer width.)
diffhist CSG 65CE02 14:07 +359 RastaKins talk contribs (→New features: 16-bit stack takes more effort to initialize but does not slow down PSOn smaller systems, the stack pointer is only initialized once having negligible effect on system performance. For high level languages stack can be shrunk with new RTN instruction. The only time the stack point may need to be explicitly set is when switching to another thread but threads are likely not to be supported)
diffhist CSG 65CE02 13:35 +290 Maury Markowitz talk contribs (the Datasheet clearly *does* state this, starting at "Setting the 16-bit pointer is done by loading the X and Y registers..." which requires two instructions instead of only one in 8-bit mode) Tag: Undo