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IP-XACT is an XML format that defines and describes individual, re-usable electronic circuit designs (individual pieces of intellectual property, or IPs) to facilitate their use in creating integrated circuits (i.e. microchips). IP-XACT was created by the SPIRIT Consortium as a standard to enable automated configuration and integration through tools.[1]

The goals of the standard are

  • to ensure delivery of compatible component descriptions from multiple component vendors,
  • to enable exchanging complex component libraries between electronic design automation (EDA) tools for SoC design (design environments),
  • to describe configurable components using metadata, and
  • to enable the provision of EDA vendor-neutral scripts for component creation and configuration (generators, configurators).

Approved as IEEE 1685-2009 on December 9, 2009, published on February 18, 2010.[2] Superseded by IEEE 1685-2014. IEEE 1685-2009 was adopted as IEC 62014-4:2015.


All documents will have the following basic titular attributes spirit:vendor, spirit:library, spirit:name, spirit:version.

A document typically represents one of:

  • bus specification, giving its signals and protocol etc.;
  • leaf IP block data sheet;
  • or a hierarchic component wiring diagram that describes a sub-system by connecting up or abstracting other components made up of spirit:componentInstance and spirit:interconnection elements.

For each port of a component there will be a spirit:busInterface element in the document. This may have a spirit:signalMap that gives the mapping of the formal net names in the interface to the names used in a corresponding formal specification of the port. A simple wiring tool will use the signal map to know which net on one interface to connect to which net on another instance of the same formal port on another component.

There may be various versions of a component referenced in the document, each as a spirit:view element, relating to different versions of a design: typical levels are gate-level, RTL and TLM. Each view typically contains a list of filenames as a spirit:fileSet that implement the design at that level of abstraction in appropriate language, like Verilog, C++ or PSL.

Non-functional data present includes the programmer's view with a list of spirit:register declarations inside a spirit:memoryMap or spirit:addressBlock.

Supporting companies and software[edit]

  • Agnisys [3]
  • Magillem [4]
  • Defacto Technologies [5]
  • Semifore, Inc [6]
  • Synopsys, Inc [7]
  • EDAUtils [8]
  • Cadence - JasperGold [9] and Interconnect Workbench (IWB) [10]
  • Xilinx
  • Lattice

See also[edit]


  1. ^ IP-XACT Working Group
  2. ^ IEEE 1685-2009, ISBN 978-0-7381-6160-0
  3. ^ Agnisys IDesignSpec
  4. ^ Magillem Design Services
  5. ^ Defacto SoC Compiler
  6. ^ Semifore, Inc
  7. ^ Synopsys, Inc
  8. ^ EDAUtils
  9. ^ Cadence's JasperGold Control and Status Register App
  10. ^ Cadence Interconnect Workbench

Further reading[edit]

External links[edit]