Reduced Latency DRAM (RLDRAM) is a type of specialty dynamic random-access memory (DRAM) with a SRAM-like interface originally developed by Infineon Technologies. It is a high-bandwidth, semi-commodity, moderately low-latency (relative to contemporaneous SRAMs) memory targeted at embedded applications (such as computer networking equipment) requiring memories that have moderate costs and low latency (relative to commodity DRAM); and capacities greater than those offered by SRAMs. RLDRAM also has better performance compared to contemporaneous commodity DRAMs when there are back-to-back read and write accesses, or completely random accesses.
The first generation RLDRAM devices appeared in 1999, and were initially only fabricated by Infineon. Later, Micron Technology was brought in as a development partner and second source for RLDRAM devices. The second-generation RLDRAM II specification was announced by Infineon and Micron in 2003.  Infineon subsequently decided to abandon RLDRAM development, and RLDRAM II devices were introduced by Micron. The first RLDRAM II samples appeared in the same year. In 2012, Micron demonstrated the first third-generation RLDRAM 3 devices. 
- ^ a b Jacob, Bruce et al. (2008). Memory Systems: Cache, DRAM, Disk. Morgan Kaufmann Publishers. pp. 494.
- ^ RLDRAM Memory: Unparalleled Bandwidth and Low Latency
- ^ Infineon and Micron Announce RLDRAM II Specification
- ^ Xilinx and Micron demo interoperability of FPGA and RLDRAM 3 memory interface standard